Intel SE7221BK1-E Security menu, PXH Bridge Configuration, Bios Setup, Security Menu Options

Page 59

SE7221BK1-E Technical Product Specification

PCI-EX Port

N/A

N/A

Configuration

 

 

 

 

 

VC1 for Root Port

Disabled

Enable / Disable VC1 feature

 

Enabled

 

 

 

 

9.5.4.3PXH Bridge Configuration

Title

VC1 feature setting on PCI Express* Root port

Table 60. BIOS Setup, ATAPI CDROM Drives Sub-menu Selections

Feature

Options

Help Text

PCI Bus frequency

Auto

Allows selection of the maximum

 

33Mhz PCI

PCI Bus speed to be programmed,

 

default will always be set to Auto

 

66Mhz PCI

 

where Bus speed will be decided

 

66Mhz PCI-X M1

 

based on the capabilities of the

 

100Mhz PCI-X M1

device on the Bus.

 

133 Mhx PCI-X M1

 

 

66Mhz PCI-X M2

 

 

100Mhz PCI-X M2

 

 

133 Mhx PCI-X M2

 

 

 

 

IO Port Decode

4K Decode

Select the decode range for IO

 

1K Decode

 

 

 

 

RAS Sticky error

Clear Errors

Select the method of handling for

handling

Leave Errors

sticky RAS errors

 

 

 

 

 

VGA 16 Bit decode

Disabled

Enabled/Disable decoding of VGA

 

Enabled

for devices behind PXH

 

 

 

 

 

Description

Select Bus speed and operating frequency of bus coming out PXH

IO decode range

RAS errors handing method selection

9.5.5Security menu

Table 61. BIOS Setup, Security Menu Options

Feature

Options

Help Text

Description

Administrator

N/A

Install / Not installed

Informational display.

Password is

 

 

 

 

 

 

 

User Password is

N/A

Install / Not installed

Informational display.

 

 

 

 

Set Admin

N/A

Set or clear Admin password

Set password to null to clear.

Password

 

 

 

 

 

 

 

Set User Password

N/A

Set or clear User password

This node is grayed out until

 

 

 

Admin password is installed.

 

 

 

Set password to null to clear.

 

 

 

 

User Access Level

No Access

LIMITED: Allows only limited fields

This node is grayed out and

 

View Only

to be changed such as Date and

becomes active only when Admin

 

Time.

password is set.

 

Limited

 

NO ACCESS: Prevents User

 

 

Full Access

 

 

access to the Setup Utility.

 

 

 

VIEW ONLY: Allows access to the

 

 

 

Setup Utility but the fields can not

 

 

 

be changed.

 

 

 

 

 

47

Image 59
Contents Intel Server Board SE7221BK1-E Date Revision Modifications Number SE7221BK1-ETechnical Product SpecificationRevision Disclaimers SE7221BK1-E Technical Product SpecificationTable of contents Acpi Implementation ConnectorsConfiguration Jumpers Bios Setup UtilityHardware Monitoring SE7221BK1 -E Technical Product SpecificationBoot Block Post Progress Codes Power Information Absolute Maximum RatingsGlossary Industry Canada ICES-003Viii List of TablesSE7221BK1-E Technical Product Specification Revision List of Figures Page Introduction Server Board Overview SE7221BK1-E Feature Setƒ LPC Low Pin Count bus segment with one embedded devices ƒ USBPCI-X 100 Slot CPUProcessor Subsystem Functional ArchitectureProcessor Support Matrix Memory SubsystemInterrupts and Apic Memory Dimm SupportMemory Configuration Memory Bank Label Definition Location Dimm Label Channel Population OrderIntel E7221 Chipset Throughput Level Configuration CharacteristicsSupported DDR2 modules 1.1 DDR2 ConfigurationsGmch Memory Architecture Overview Graphics Memory Controller Hub GmchPCI Bus P32-A I/O Subsystem 3 ICH6RUSB Interface Power ManagementPCI Express* X4 Subsystem PCI Bus Master IDE InterfaceSerial Ports Super I/OSystem Health Support Bios FlashO Subsystem PCI Subsystem2.2 P32-B Arbitration 2 P32-B 66-MHz PCI-X Subsystem SE7221BK1LX sku only1.2 P32-A Arbitration P32-B Arbitration Connections P64-C Configuration IDs3 P64-C 66/100-MHz PCI-X Subsystem 3.2 P64-C ArbitrationPCI-E NIC Connector and Status LEDsVideo Controller Network Interface Controller NICLegacy Interrupt Sources Interrupt RoutingLegacy Interrupt Routing Apic Interrupt RoutingISA Interrupt Description PCI Error HandlingSerialized IRQ Support Gmch Intr CPU ICH6ICH6 Ioapic DMI Interface PCI Interface Super I/OPB IRQ8 Interface PA IRQ8 InterfaceAcpi Front Panel SwitchesAcpi Implementation USB Power Button On to Off Legacy Power Button On to Off AcpiWake up Sources Acpi and Legacy Supported Wake EventsAuxiliary CPU Power Connector Pin-out CN4B1 ConnectorsMain Power Connector Power Connector Pin-out CN4H1LCD Header Pin-out J1C1 Front Panel ConnectorI2C Header Hsbp Header Pin-out J1D1NIC1-82541PI10/100/1000 Connector Pin-out J5A1 VGA ConnectorNIC Connector VGA Connector Pin-out J8A1IDEA1 Diag IDEA0 IDEA2 IDEDCS0# IDEDCS1# IDEHDACT# GND IDE ConnectorNIC2-82541PI 10/100/1000 Connector Pin-out J6A1 ATA 40-pin Connector Pin-out J3J1USB Connectors Pin-out J5A1 Sata ConnectorUSB Connector Sata Connector Pin-out J1G1, J1G2, J1J2, J2J1External DB9 Serial a Port Pin-out J8A1 Floppy ConnectorSerial Port Connector Legacy 34-pin Floppy Connector Pin-out JP3J1Fan Header Keyboard and Mouse ConnectorKeyboard and Mouse PS/2 Connectors Pin-out KM9A1 Miscellaneous HeadersHDD LED Header Intrusion Cable ConnectorIntrusion Cable Connector J1A1Pin-Out Pin Signal Name HDD LED Header J1E1 Pin-Out Pin Signal NameSystem Recovery and Update Jumper Options Configuration JumpersSystem Recovery and Update Jumpers Rolling Bios selection headerLocalization Bios Setup UtilityConfiguration Reset Keyboard CommandsPost Load Setup Defaults?Cancel ESCFeature Options Help Text Description Entering Bios SetupBios Setup, Main Menu Options Save configuration changes and exit setup?Advanced menu Processor configuration sub-menuBios Setup, Advanced Menu Options Bios Setup, Processor configuration sub-menu optionsCompatible IDE configuration sub-menuBios Setup IDE Configuration Menu Options EnabledCdrom Armd Bios Setup, IDE Device Configuration Sub-menu SelectionsHost & Device AutoBios Setup, Super I/O Configuration Sub-menu Floppy configuration sub-menuSuper I/O configuration sub-menu Bios Setup, Floppy Configuration Sub-menu SelectionsBios Setup, USB Configuration Sub-menu Selections USB configuration sub-menuCdrom PCI configuration sub-menuBios Setup, PCI Configuration Sub-menu Selections FDDBios Setup, Boot Menu Selections Boot menuMemory configuration sub-menu Bios Setup, Memory Configuration Sub-menu SelectionsBios Setup, Boot Device Priority Sub-menu Selections Boot settings configuration sub-menu selectionsBoot device priority sub-menu selections Bios Setup, Boot Settings Configuration Sub-menu SelectionsChipset Menu North Bridge Chipset ConfigurationBios Setup, Removable Drives Sub-menu Selections Bios Setup, Atapi Cdrom Drives Sub-menu SelectionsDram Clocks South Bridge Chipset ConfigurationEnabled, 8MB Feature Options Help TextSecurity menu PXH Bridge ConfigurationBios Setup, Security Menu Options Minute Bios Setup, Server Menu SelectionsServer menu Stay On Bios Setup, System Management Sub-menu SelectionsSystem management sub-menu selections Stays OffBios Setup, Event Log Configuration Sub-menu Selections Serial Console features sub-menu selectionsEvent Log configuration sub-menu selections Bios Setup Serial Console Features Sub-menu SelectionsBios Setup, Exit Menu Selections Upgrading the BiosPreparing for the Upgrade Recording the Current Bios SettingsFlash Update Utility Obtaining the Upgrade Utility Creating a Bootable DisketteRolling Bios and On-line updates Flash Architecture and Flash Update Utility\split AMIBOOT.ROM Amiboot Recovery ModeBios Recovery Multi-Disk RecoverySummary of Beep codes Manually Recovering the BiosBeeps Error Message Post Progress Code Description Error Handling and ReportingPost Error Beep Codes Post Error Beep CodesPmmmemallocerr Bios Event LogPost Error Messages and Handling Error Code Error Message ResponseLanguagemoduleerr Post Progress Codes and MessagesPost Code Checkpoints Post Code CheckpointsEnable IRQ-0 in PIC for system timer interrupt Initializes remaining option ROMs Bootblock Initialization Code Checkpoints Boot Block Initialization Code CheckpointsBootblock Recovery Code Checkpoints Boot Block Recovery Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsPost Progress Code LED Example Diagnostic LEDsDiagnostic LED Post Progress Codes Boot Block Post Progress CodesPost Progress Codes SE7221BK1-ETechnical Product Specification SE7221BK1-E Technical Product Specification Power Supply Rail Voltages Units Watts Power InformationIntel Server Board SE7221BK1-E Power Budget Board Power Budget5VSB output voltage rise time shall be from 1.0ms to 25.0ms Power Supply SpecificationsPower Timing Requirements Board Power Supply Voltage SpecificationOutput Voltage Timing Turn On/Off Timing +5VSB Dynamic LoadingTransient Load Requirements AC Line Sag Transient Performance AC Line Transient SpecificationAC Line Fast Transient EFT Specification Absolute Maximum RatingsMonitored Components Hardware MonitoringMean Time Between Failures Mtbf Test Results Monitored ComponentsHTHEMPDA/C TemperatureFANIN7 PIN #9 Fan Speed Control Fan Speed Control Block DiagramProduct EMC Compliance Product Safety ComplianceProduct Regulatory Compliance Chassis IntrusionFCC USA Electromagnetic Compatibility NoticesKorean RRL Compliance Europe CE Declaration of ConformityTaiwan Declaration of Conformity Australia / New Zealand Replacing the Back-Up BatteryMtbf Data Mechanical SpecificationsProduct Code Calculated Mtbf Operating Temperature Calculated Mean Time Between Failures MtbfSE7221BK1-E Server Board Mechanical Drawing Sku 1 Pedestal mount I/O shield mechanical drawing Revision Sku 2 Pedestal mount I/O shield mechanical drawing Page Term Definition Glossary SE7221BK1-E Technical Product SpecificationMtbf LPCMBE MSBZCR SE7221BK1-E Technical Product Specification GlossaryVGA VID