Intel manual SE7221BK1-E Technical Product Specification

Page 79

SE7221BK1-E Technical Product Specification

 

Diagnostic LED

 

Description

 

Decoder

 

 

 

 

G=Green, R=Red,

 

 

 

A=Amber

 

 

 

 

Hi

 

 

Low

 

 

 

 

 

 

 

78h

G

R

R

R

Extended background memory test start

 

 

 

 

 

 

7Ah

G

R

A

R

Disable parity and NMI reporting.

 

 

 

 

 

 

7Ch

G

A

R

R

Test 8237 DMA Controller: The DMA page register test passed. Performing the

DMA Controller 1 base register test next

 

 

 

 

 

 

 

 

 

 

 

7Eh

G

A

A

R

Init 8237 DMA Controller: The DMA controller 2 base register test passed.

Programming DMA controllers 1 and 2 next.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Enable Mouse and Keyboard: The keyboard test has started. Clearing the

80h

R

Off

Off

Off

output buffer and checking for stuck keys. Issuing the keyboard reset command

 

 

 

 

 

next

 

 

 

 

 

 

82h

R

Off

G

Off

Keyboard Interface Test: A keyboard reset error or stuck key was found. Issuing

the keyboard controller interface test command next.

 

 

 

 

 

84h

R

G

Off

Off

Check Stuck Key Enable Keyboard: The keyboard controller interface test

completed. Writing the command byte and initializing the circular buffer next.

 

 

 

 

 

 

 

 

 

 

 

86h

R

G

G

Off

Disable parity NMI: The command byte was written and global data initialization

has completed. Checking for a locked key next

 

 

 

 

 

 

 

 

 

 

 

88h

A

Off

Off

Off

Display USB devices

 

 

 

 

 

 

8Ah

A

Off

G

Off

Verify RAM Size: Checking for a memory size mismatch with CMOS RAM data

next

 

 

 

 

 

 

 

 

 

 

 

8Ch

A

G

Off

Off

Lock out PS/2 keyboard/mouse if unattended start is enabled.

 

 

 

 

 

 

 

 

 

 

 

Init Boot Devices: The adapter ROM had control and has now returned control

8Eh

A

G

G

Off

to BIOS POST. Performing any required processing after the option ROM

 

 

 

 

 

returned control.

90h

R

Off

Off

R

Display IDE mass storage devices.

 

 

 

 

 

 

92h

R

Off

G

R

Display USB mass storage devices.

 

 

 

 

 

 

94h

R

G

Off

R

Report the first set of POST Errors To Error Manager.

 

 

 

 

 

 

96h

R

G

G

R

Boot Password Check: The password was checked. Performing any required

programming before Setup next.

 

 

 

 

 

 

 

 

 

 

 

98h

A

Off

Off

R

Float Processor Initialize: Performing any required initialization before the

coprocessor test next.

 

 

 

 

 

 

 

 

 

 

 

9Ah

A

Off

G

R

Enable Interrupts 0,1,2: Checking the extended keyboard, keyboard ID, and

NUM Lock key next. Issuing the keyboard ID command next

 

 

 

 

 

 

 

 

 

 

 

9Ch

A

G

Off

R

Init FDD Devices. Report second set of POST errors To Error messager

 

 

 

 

 

 

9Eh

A

G

G

R

Extended background memory test end

 

 

 

 

 

 

A0h

R

Off

R

Off

Prepare And Run Setup: Error manager displays and logs POST errors. Waits

for user input for certain errors. Execute setup.

 

 

 

 

 

A2h

R

Off

A

Off

Set Base Expansion Memory Size

 

 

 

 

 

 

A4h

R

G

R

Off

Program chipset setup options, build ACPI Tables, build INT15h E820h table

 

 

 

 

 

 

A6h

R

G

A

Off

Set Display Mode

 

 

 

 

 

 

A8h

A

Off

R

Off

Build SMBIOS table and MP tables.

 

 

 

 

 

 

Aah

A

Off

A

Off

Clear video screen.

 

 

 

 

 

 

Ach

A

G

R

Off

Prepare USB controllers for operating system

 

 

 

 

 

 

Aeh

A

G

A

Off

One Beep to indicate end of POST. No beep if silent boot is enabled.

 

 

 

 

 

 

000h

Off

Off

Off

Off

POST completed. Passing control to INT 19h boot loader next.

 

 

 

 

 

 

67

Image 79
Contents Intel Server Board SE7221BK1-E Revision SE7221BK1-ETechnical Product SpecificationDate Revision Modifications Number Disclaimers SE7221BK1-E Technical Product SpecificationTable of contents Acpi Implementation ConnectorsConfiguration Jumpers Bios Setup UtilityHardware Monitoring SE7221BK1 -E Technical Product SpecificationBoot Block Post Progress Codes Power Information Absolute Maximum RatingsGlossary Industry Canada ICES-003Viii List of TablesSE7221BK1-E Technical Product Specification Revision List of Figures Page Introduction Server Board Overview SE7221BK1-E Feature Setƒ LPC Low Pin Count bus segment with one embedded devices ƒ USBPCI-X 100 Slot CPUProcessor Subsystem Functional ArchitectureProcessor Support Matrix Memory SubsystemInterrupts and Apic Memory Dimm SupportMemory Configuration Memory Bank Label Definition Location Dimm Label Channel Population OrderIntel E7221 Chipset Throughput Level Configuration CharacteristicsSupported DDR2 modules 1.1 DDR2 ConfigurationsGmch Memory Architecture Overview Graphics Memory Controller Hub GmchPCI Bus P32-A I/O Subsystem 3 ICH6RUSB Interface Power ManagementPCI Express* X4 Subsystem PCI Bus Master IDE InterfaceSerial Ports Super I/OSystem Health Support Bios FlashO Subsystem PCI Subsystem1.2 P32-A Arbitration 2 P32-B 66-MHz PCI-X Subsystem SE7221BK1LX sku only2.2 P32-B Arbitration P32-B Arbitration Connections P64-C Configuration IDs3 P64-C 66/100-MHz PCI-X Subsystem 3.2 P64-C ArbitrationPCI-E NIC Connector and Status LEDsVideo Controller Network Interface Controller NICLegacy Interrupt Sources Interrupt RoutingLegacy Interrupt Routing Apic Interrupt RoutingSerialized IRQ Support PCI Error HandlingISA Interrupt Description ICH6 Ioapic DMI Interface ICH6Gmch Intr CPU PCI Interface Super I/OPB IRQ8 Interface PA IRQ8 InterfaceAcpi Implementation Front Panel SwitchesAcpi USB Power Button On to Off Legacy Power Button On to Off AcpiWake up Sources Acpi and Legacy Supported Wake EventsAuxiliary CPU Power Connector Pin-out CN4B1 ConnectorsMain Power Connector Power Connector Pin-out CN4H1LCD Header Pin-out J1C1 Front Panel ConnectorI2C Header Hsbp Header Pin-out J1D1NIC1-82541PI10/100/1000 Connector Pin-out J5A1 VGA ConnectorNIC Connector VGA Connector Pin-out J8A1IDEA1 Diag IDEA0 IDEA2 IDEDCS0# IDEDCS1# IDEHDACT# GND IDE ConnectorNIC2-82541PI 10/100/1000 Connector Pin-out J6A1 ATA 40-pin Connector Pin-out J3J1USB Connectors Pin-out J5A1 Sata ConnectorUSB Connector Sata Connector Pin-out J1G1, J1G2, J1J2, J2J1External DB9 Serial a Port Pin-out J8A1 Floppy ConnectorSerial Port Connector Legacy 34-pin Floppy Connector Pin-out JP3J1Fan Header Keyboard and Mouse ConnectorKeyboard and Mouse PS/2 Connectors Pin-out KM9A1 Miscellaneous HeadersHDD LED Header Intrusion Cable ConnectorIntrusion Cable Connector J1A1Pin-Out Pin Signal Name HDD LED Header J1E1 Pin-Out Pin Signal NameSystem Recovery and Update Jumper Options Configuration JumpersSystem Recovery and Update Jumpers Rolling Bios selection headerLocalization Bios Setup UtilityConfiguration Reset Keyboard CommandsPost Load Setup Defaults?Cancel ESCFeature Options Help Text Description Entering Bios SetupBios Setup, Main Menu Options Save configuration changes and exit setup?Advanced menu Processor configuration sub-menuBios Setup, Advanced Menu Options Bios Setup, Processor configuration sub-menu optionsCompatible IDE configuration sub-menuBios Setup IDE Configuration Menu Options EnabledCdrom Armd Bios Setup, IDE Device Configuration Sub-menu SelectionsHost & Device AutoBios Setup, Super I/O Configuration Sub-menu Floppy configuration sub-menuSuper I/O configuration sub-menu Bios Setup, Floppy Configuration Sub-menu SelectionsBios Setup, USB Configuration Sub-menu Selections USB configuration sub-menuCdrom PCI configuration sub-menuBios Setup, PCI Configuration Sub-menu Selections FDDBios Setup, Boot Menu Selections Boot menuMemory configuration sub-menu Bios Setup, Memory Configuration Sub-menu SelectionsBios Setup, Boot Device Priority Sub-menu Selections Boot settings configuration sub-menu selectionsBoot device priority sub-menu selections Bios Setup, Boot Settings Configuration Sub-menu SelectionsChipset Menu North Bridge Chipset ConfigurationBios Setup, Removable Drives Sub-menu Selections Bios Setup, Atapi Cdrom Drives Sub-menu SelectionsDram Clocks South Bridge Chipset ConfigurationEnabled, 8MB Feature Options Help TextBios Setup, Security Menu Options PXH Bridge ConfigurationSecurity menu Server menu Bios Setup, Server Menu SelectionsMinute Stay On Bios Setup, System Management Sub-menu SelectionsSystem management sub-menu selections Stays OffBios Setup, Event Log Configuration Sub-menu Selections Serial Console features sub-menu selectionsEvent Log configuration sub-menu selections Bios Setup Serial Console Features Sub-menu SelectionsBios Setup, Exit Menu Selections Upgrading the BiosPreparing for the Upgrade Recording the Current Bios SettingsFlash Update Utility Obtaining the Upgrade Utility Creating a Bootable DisketteRolling Bios and On-line updates Flash Architecture and Flash Update Utility\split AMIBOOT.ROM Amiboot Recovery ModeBios Recovery Multi-Disk RecoverySummary of Beep codes Manually Recovering the BiosBeeps Error Message Post Progress Code Description Error Handling and ReportingPost Error Beep Codes Post Error Beep CodesPmmmemallocerr Bios Event LogPost Error Messages and Handling Error Code Error Message ResponseLanguagemoduleerr Post Progress Codes and MessagesPost Code Checkpoints Post Code CheckpointsEnable IRQ-0 in PIC for system timer interrupt Initializes remaining option ROMs Bootblock Initialization Code Checkpoints Boot Block Initialization Code CheckpointsBootblock Recovery Code Checkpoints Boot Block Recovery Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsAcpi Runtime Checkpoints DIM Code CheckpointsPost Progress Code LED Example Diagnostic LEDsDiagnostic LED Post Progress Codes Boot Block Post Progress CodesPost Progress Codes SE7221BK1-ETechnical Product Specification SE7221BK1-E Technical Product Specification Power Supply Rail Voltages Units Watts Power InformationIntel Server Board SE7221BK1-E Power Budget Board Power Budget5VSB output voltage rise time shall be from 1.0ms to 25.0ms Power Supply SpecificationsPower Timing Requirements Board Power Supply Voltage SpecificationOutput Voltage Timing Turn On/Off Timing Transient Load Requirements Dynamic Loading+5VSB AC Line Sag Transient Performance AC Line Transient SpecificationAC Line Fast Transient EFT Specification Absolute Maximum RatingsMonitored Components Hardware MonitoringMean Time Between Failures Mtbf Test Results Monitored ComponentsFANIN7 PIN #9 TemperatureHTHEMPDA/C Fan Speed Control Fan Speed Control Block DiagramProduct EMC Compliance Product Safety ComplianceProduct Regulatory Compliance Chassis IntrusionFCC USA Electromagnetic Compatibility NoticesTaiwan Declaration of Conformity Europe CE Declaration of ConformityKorean RRL Compliance Australia / New Zealand Replacing the Back-Up BatteryMtbf Data Mechanical SpecificationsProduct Code Calculated Mtbf Operating Temperature Calculated Mean Time Between Failures MtbfSE7221BK1-E Server Board Mechanical Drawing Sku 1 Pedestal mount I/O shield mechanical drawing Revision Sku 2 Pedestal mount I/O shield mechanical drawing Page Term Definition Glossary SE7221BK1-E Technical Product SpecificationMtbf LPCMBE MSBZCR SE7221BK1-E Technical Product Specification GlossaryVGA VID