Intel
manual
Intel IQ80333 I/O Processor, Customer Reference Board Manual
Functional Diagram
Connecting with GDB
Configuration
Board Reset Scheme
Setup
Connector Summary
Battery Status
Battery Backup
Setting CodeLab Debug Options
Power Requirements
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Intel
®
IQ80333 I/O Processor
Customer Reference Board Manual
February 2005
Document Number: 306690001US
Intel Part Number:
C90183-001
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Contents
Customer Reference Board Manual
Intel IQ80333 I/O Processor
Customer Reference Board Manual
Contents
Dram
2.2
Figures
Tables
Date Revision Description
Revision History
Other Related Documents
Document Purpose and Scope
Component References
Electronic Information
Electronic Information
Component Reference
Terms and Definitions
Terms and Definitions
Definition
Intel 80333 I/O Processor
231
Intel 80333 I/O Processor Block Diagram
Feature Definition
Summary of Features
Hardware Installation
Kit Content
First-Time Installation and Test
Power Requirements
Contents of the Flash
Factory Settings
Development Strategy
Supported Tool Buckets
Target Monitors
RedHat RedBoot
Serial-UART Communication
Host Communications Examples
Jtag Debug Communication
Network Communication Example
Network Communication
GNUPro GDB/Insight
Communicating with RedBoot
Intel IQ80333 I/O Processor
GDB set remotebaud
Connecting with GDB
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Target Market
Functional Diagram
PCI Express RAID card
Board Form-Factor/Connectivity
Form-Factor/Connectivity Features
Power Features
Power
Memory Subsystem
Battery Backup
Flash Memory Requirements
Flash Memory Requirements
External Interrupt Routing to Intel 80333 I/O Processor
Interrupt Routing
80333 populates the peripheral bus as depicted by Figure
Peripheral Bus Features
Flash ROM
Flash ROM Features
Flash Connection on Peripheral Bus
Uart
Rotary Switch
Non-Volatile RAM
Audio Buzzer
Battery Status Buffer Requirements
Battery Status
Name Description
Console Serial Port
Debug Interface
Jtag Port
Jtag Debug
Jtag Port Pin-out
Reset Requirements/Schemes
Board Reset Scheme
Switch Summary
Switches and Jumpers
Default Switch Settings of S7A1- Visual
Switch Summary
Jumper Summary
Connector Summary
General Purpose Input/Output Header
Switch S1C2 Intel 80333 I/O Processor Reset
Detail Descriptions of Switches/Jumpers
Switch S6A1 BPCI-X Reset
Switch S8A1 Rotary
Switch S7A1-3 Retry Settings and Operation Mode
Switch S7A1-2 Reset IOP Settings and Operation Mode
S7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode
S7A1-9 Operation Mode
S7A1-8 Operation Mode
S7A1-10 Operation Mode
Jumper J1C1 Jtag Chain
Jumper J7D1 Flash bit-width
Jumper J1D2 Uart Control
Jumper J7B4 SMBus Header
Jumper J9D3 Buzzer Volume Control
Components on the Peripheral Bus
Dram
Flash Connection to Peripheral Bus
Address Range in Hex Size Data Bus Width Description
Peripheral Bus Memory Map
Intel 80333 I/O Processor Memory Map
Board Support Package BSP Examples
RedBoot Intel 80333 I/O Processor Files
RedBoot* Intel 80333 I/O Processor Memory Map
Virtual Address Physical Address Size Description
Mov R8, r4
IQ80321 and IQ80333 Comparisons
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Purpose
Introduction
Related Web Sites
Hardware Setup
Setup
Software Flow Diagram
Software Setup
Creating a New Project
New Project Setup
Configuration
Overview
Flashing with Jtag
Using Flash Programmer
Building an Executable File From Example Code
Debugging Out of Flash
Running the CodeLab Debugger
Launching and Configuring Debugger
Manually Loading and Executing an Application Program
Displaying Source Code
Using Breakpoints
Stepping Through the Code
Setting CodeLab Debug Options
Exploring the CodeLab Debug Windows
Watch Window
Registers Window
Variables Window
Hardware and Software Breakpoints
Debugging Basics
Software Breakpoints
Hardware Breakpoints
Exceptions/Trapping
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