Intel IQ80333 manual Board Reset Scheme, Reset Requirements/Schemes

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Intel® IQ80333 I/O Processor

Hardware Reference Section

3.8Board Reset Scheme

Figure 10 depicts the reset scheme for the 80333. Table 14 list the reset schemes for the 80333.

Table 14. Reset Requirements/Schemes

Description

Primary PCI reset, resets all devices on the board. It occurs during the power-up.

The SRST signal from the JTAG connector is a bi-directional signal that can force a reset similar to the power-up reset on the board.

Figure 10. RESET Sources

 

 

DDR II SDRAM

 

Reset

 

 

 

Button

 

M_RST#

 

 

 

 

Debounce

 

RESETIN

 

 

#

PCI-X Con B

 

 

 

 

B_RST#

 

 

 

Power

 

PWRDELAY

 

Delay

 

 

 

Intel® 80333 I/O

 

 

 

 

 

 

Processor

PCI-X Con A

 

TRST

A_RST#

JTAG

TRST

 

#

 

#

 

Con

SRST

CPLD

 

#

 

 

 

PWRGD

RST#

 

 

Voltage

 

 

LAN_PWR_GOOD

 

 

82545EM

Monitor

 

 

 

 

Isolation

 

 

 

 

 

Pwrgood

 

 

 

PCI-E Con

 

Customer Reference Board Manual

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Contents Customer Reference Board Manual Intel IQ80333 I/O ProcessorCustomer Reference Board Manual Contents Dram 2.2 Figures Tables Date Revision Description Revision HistoryOther Related Documents Document Purpose and ScopeComponent References Electronic InformationElectronic Information Component ReferenceTerms and Definitions Terms and DefinitionsDefinition Intel 80333 I/O Processor 231 Intel 80333 I/O Processor Block DiagramFeature Definition Summary of FeaturesHardware Installation Kit ContentFirst-Time Installation and Test Power Requirements Contents of the Flash Factory SettingsDevelopment Strategy Supported Tool BucketsTarget Monitors RedHat RedBootSerial-UART Communication Host Communications ExamplesJtag Debug Communication Network Communication Example Network CommunicationGNUPro GDB/Insight Communicating with RedBootIntel IQ80333 I/O Processor GDB set remotebaud Connecting with GDBThis Page Left Intentionally Blank Target Market Functional DiagramPCI Express RAID card Board Form-Factor/Connectivity Form-Factor/Connectivity FeaturesPower Features PowerMemory Subsystem Battery BackupFlash Memory Requirements Flash Memory RequirementsExternal Interrupt Routing to Intel 80333 I/O Processor Interrupt Routing80333 populates the peripheral bus as depicted by Figure Peripheral Bus FeaturesFlash ROM Flash ROM FeaturesFlash Connection on Peripheral Bus Uart Rotary SwitchNon-Volatile RAM Audio BuzzerBattery Status Buffer Requirements Battery StatusName Description Console Serial Port Debug InterfaceJtag Port Jtag DebugJtag Port Pin-out Reset Requirements/Schemes Board Reset SchemeSwitch Summary Switches and JumpersDefault Switch Settings of S7A1- Visual Switch SummaryJumper Summary Connector SummaryGeneral Purpose Input/Output Header Switch S1C2 Intel 80333 I/O Processor Reset Detail Descriptions of Switches/JumpersSwitch S6A1 BPCI-X Reset Switch S8A1 RotarySwitch S7A1-3 Retry Settings and Operation Mode Switch S7A1-2 Reset IOP Settings and Operation ModeS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode S7A1-9 Operation Mode S7A1-8 Operation ModeS7A1-10 Operation Mode Jumper J1C1 Jtag Chain Jumper J7D1 Flash bit-widthJumper J1D2 Uart Control Jumper J7B4 SMBus Header Jumper J9D3 Buzzer Volume ControlComponents on the Peripheral Bus DramFlash Connection to Peripheral Bus Address Range in Hex Size Data Bus Width Description Peripheral Bus Memory MapIntel 80333 I/O Processor Memory Map Board Support Package BSP ExamplesRedBoot Intel 80333 I/O Processor Files RedBoot* Intel 80333 I/O Processor Memory MapVirtual Address Physical Address Size Description Mov R8, r4 IQ80321 and IQ80333 Comparisons This Page Left Intentionally Blank Purpose IntroductionRelated Web Sites Hardware Setup SetupSoftware Flow Diagram Software SetupCreating a New Project New Project SetupConfiguration Overview Flashing with JtagUsing Flash Programmer Building an Executable File From Example Code Debugging Out of FlashRunning the CodeLab Debugger Launching and Configuring DebuggerManually Loading and Executing an Application Program Displaying Source Code Using BreakpointsStepping Through the Code Setting CodeLab Debug OptionsExploring the CodeLab Debug Windows Watch Window Registers WindowVariables Window Hardware and Software Breakpoints Debugging BasicsSoftware Breakpoints Hardware BreakpointsExceptions/Trapping

IQ80333 specifications

The Intel IQ80333 is a high-performance microprocessor designed specifically for advanced networking, telecommunications, and industrial control applications. Known for its ability to deliver exceptional processing power while maintaining efficiency, the IQ80333 represents a key component in the evolution of embedded systems and real-time applications.

One of the principal features of the IQ80333 is its multi-core architecture. It is equipped with dual-core processing capabilities, allowing it to handle multiple tasks simultaneously. This multi-core setup leads to improved throughput and responsiveness, which is critical in environments that demand real-time data processing and robust multitasking.

The IQ80333 is built on Intel's x86 architecture, ensuring compatibility with a wide range of software applications. This feature is particularly valuable for system designers looking to leverage existing codebases while upgrading their hardware. The x86 architecture also supports a variety of operating systems, giving developers the flexibility to choose the most suitable environment for their applications.

In terms of performance, the IQ80333 boasts a clock speed that can reach up to 1.6 GHz. This high frequency, combined with a well-optimized pipeline and cache architecture, allows for swift execution of complex algorithms and processing-intensive tasks. The chip features a large L2 cache, which enhances its ability to manage memory operations and increases overall system performance.

Power efficiency is another standout characteristic of the Intel IQ80333. Designed for embedded applications, it incorporates features that reduce power consumption without sacrificing performance. This energy-efficient design is particularly important for devices operating in remote environments or where power availability is limited.

The IQ80333 also integrates advanced security technologies that are critical for maintaining data integrity in networked applications. Features such as secure boot and hardware-based encryption provide a robust foundation for creating secure systems, guarding against unauthorized access and ensuring the confidentiality of sensitive information.

Moreover, the microprocessor supports a range of interfaces, including PCI Express, USB, and SATA, allowing seamless integration into various systems and enabling connectivity with peripheral devices. This versatility makes the IQ80333 a preferred choice for developers looking to create customized solutions in networking and industrial applications.

In summary, the Intel IQ80333 combines high performance, energy efficiency, and robust security features, making it an ideal choice for modern embedded systems. Its multi-core architecture, support for x86 software, and advanced connectivity options provide engineers and developers with the tools they need to build sophisticated applications. Whether in telecommunications, industrial control, or networking, the IQ80333 continues to be a pivotal component in the advancement of technology in these fields.