Intel IQ80333 manual Memory Subsystem, Battery Backup

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Intel® IQ80333 I/O Processor

Hardware Reference Section

3.4Memory Subsystem

The Memory Controller of 80333 controls the DDR SDRAM memory subsystem. It features pro- grammable chip selects and support for error correction codes (ECC). The memory controller can be configured for DDR SDRAM at 333 MHz and DDR-II at 400 MHz. The memory controller supports pipelined access and arbitration control to maximize performance. The memory controller interface configuration support includes Unbuffered DIMMs, Registered DIMMs, and discrete

DDR SDRAM devices.

This IQ80333 has DDR-II at 400 MHz DIMM on the board. The memory subsystem of the evaluation board consists of the SDRAM as well as the Flash memory subsystems.

3.4.1DDR SDRAM

The DDR SDRAM interface consists of a 64-bit wide data path to support up to 3.2 Gbytes/sec throughput. An 8-bit Error Correction Code (ECC) is stored into the DDRII SDRAM array along with the data and is checked when the data is read.

The IQ80333 features on board registered DDRII 400 MHz SDRAM, arranged 512 Mbit x16 in density (256 MB), and with ECC.

3.4.1.1Battery Backup

Battery backup is provided to save any information in DDR during a power failure. The evaluation board contains a 4 V Li-ion battery, a charging circuit and a regulator circuit.

DDRII technology provides enabling data preservation through the self-refresh command. When the processor receives an active Primary PCI-X reset, the self-refresh command issues, driving SCKE signals low. Upon seeing this condition, the board logic circuit holds SCKE low before the processor loses power. Batteries maintain power to DDRII and logic, to ensure self-refresh mode. When the circuit detects PRST# returning to inactive state, the circuit releases the hold on SCKE. Removing the battery can disable the battery circuit. When the battery remains in the platform when it is de-powered and/or removed from the chassis, the battery maintains DDRII for about four hours. Once power is reapplied, the battery is fully charged.

The CPLD contains information in regards to the battery status. Please see Section 3.6.7, “Battery Status” on page 34 for more details.

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Contents Intel IQ80333 I/O Processor Customer Reference Board ManualCustomer Reference Board Manual Contents Dram 2.2 Figures Tables Revision History Date Revision DescriptionDocument Purpose and Scope Other Related DocumentsElectronic Information Component ReferencesElectronic Information Component ReferenceTerms and Definitions Terms and DefinitionsDefinition Intel 80333 I/O Processor Intel 80333 I/O Processor Block Diagram 231Summary of Features Feature DefinitionHardware Installation Kit ContentFirst-Time Installation and Test Power Requirements Factory Settings Contents of the FlashDevelopment Strategy Supported Tool BucketsRedHat RedBoot Target MonitorsSerial-UART Communication Host Communications ExamplesJtag Debug Communication Network Communication Network Communication ExampleCommunicating with RedBoot GNUPro GDB/InsightIntel IQ80333 I/O Processor Connecting with GDB GDB set remotebaudThis Page Left Intentionally Blank Target Market Functional DiagramPCI Express RAID card Form-Factor/Connectivity Features Board Form-Factor/ConnectivityPower Power FeaturesBattery Backup Memory SubsystemFlash Memory Requirements Flash Memory RequirementsInterrupt Routing External Interrupt Routing to Intel 80333 I/O ProcessorPeripheral Bus Features 80333 populates the peripheral bus as depicted by FigureFlash ROM Flash ROM FeaturesFlash Connection on Peripheral Bus Rotary Switch UartNon-Volatile RAM Audio BuzzerBattery Status Buffer Requirements Battery StatusName Description Debug Interface Console Serial PortJtag Port Jtag DebugJtag Port Pin-out Board Reset Scheme Reset Requirements/SchemesSwitches and Jumpers Switch SummaryDefault Switch Settings of S7A1- Visual Switch SummaryJumper Summary Connector SummaryGeneral Purpose Input/Output Header Detail Descriptions of Switches/Jumpers Switch S1C2 Intel 80333 I/O Processor ResetSwitch S6A1 BPCI-X Reset Switch S8A1 RotarySwitch S7A1-3 Retry Settings and Operation Mode Switch S7A1-2 Reset IOP Settings and Operation ModeS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode S7A1-9 Operation Mode S7A1-8 Operation ModeS7A1-10 Operation Mode Jumper J1C1 Jtag Chain Jumper J7D1 Flash bit-widthJumper J1D2 Uart Control Jumper J9D3 Buzzer Volume Control Jumper J7B4 SMBus HeaderDram Components on the Peripheral BusFlash Connection to Peripheral Bus Peripheral Bus Memory Map Address Range in Hex Size Data Bus Width DescriptionBoard Support Package BSP Examples Intel 80333 I/O Processor Memory MapRedBoot Intel 80333 I/O Processor Files RedBoot* Intel 80333 I/O Processor Memory MapVirtual Address Physical Address Size Description Mov R8, r4 IQ80321 and IQ80333 Comparisons This Page Left Intentionally Blank Introduction PurposeRelated Web Sites Setup Hardware SetupSoftware Setup Software Flow DiagramNew Project Setup Creating a New ProjectConfiguration Flashing with Jtag OverviewUsing Flash Programmer Debugging Out of Flash Building an Executable File From Example CodeRunning the CodeLab Debugger Launching and Configuring DebuggerManually Loading and Executing an Application Program Using Breakpoints Displaying Source CodeSetting CodeLab Debug Options Stepping Through the CodeExploring the CodeLab Debug Windows Watch Window Registers WindowVariables Window Debugging Basics Hardware and Software BreakpointsSoftware Breakpoints Hardware BreakpointsExceptions/Trapping

IQ80333 specifications

The Intel IQ80333 is a high-performance microprocessor designed specifically for advanced networking, telecommunications, and industrial control applications. Known for its ability to deliver exceptional processing power while maintaining efficiency, the IQ80333 represents a key component in the evolution of embedded systems and real-time applications.

One of the principal features of the IQ80333 is its multi-core architecture. It is equipped with dual-core processing capabilities, allowing it to handle multiple tasks simultaneously. This multi-core setup leads to improved throughput and responsiveness, which is critical in environments that demand real-time data processing and robust multitasking.

The IQ80333 is built on Intel's x86 architecture, ensuring compatibility with a wide range of software applications. This feature is particularly valuable for system designers looking to leverage existing codebases while upgrading their hardware. The x86 architecture also supports a variety of operating systems, giving developers the flexibility to choose the most suitable environment for their applications.

In terms of performance, the IQ80333 boasts a clock speed that can reach up to 1.6 GHz. This high frequency, combined with a well-optimized pipeline and cache architecture, allows for swift execution of complex algorithms and processing-intensive tasks. The chip features a large L2 cache, which enhances its ability to manage memory operations and increases overall system performance.

Power efficiency is another standout characteristic of the Intel IQ80333. Designed for embedded applications, it incorporates features that reduce power consumption without sacrificing performance. This energy-efficient design is particularly important for devices operating in remote environments or where power availability is limited.

The IQ80333 also integrates advanced security technologies that are critical for maintaining data integrity in networked applications. Features such as secure boot and hardware-based encryption provide a robust foundation for creating secure systems, guarding against unauthorized access and ensuring the confidentiality of sensitive information.

Moreover, the microprocessor supports a range of interfaces, including PCI Express, USB, and SATA, allowing seamless integration into various systems and enabling connectivity with peripheral devices. This versatility makes the IQ80333 a preferred choice for developers looking to create customized solutions in networking and industrial applications.

In summary, the Intel IQ80333 combines high performance, energy efficiency, and robust security features, making it an ideal choice for modern embedded systems. Its multi-core architecture, support for x86 software, and advanced connectivity options provide engineers and developers with the tools they need to build sophisticated applications. Whether in telecommunications, industrial control, or networking, the IQ80333 continues to be a pivotal component in the advancement of technology in these fields.
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