Intel IQ80333 manual Contents

Page 3

 

 

 

 

Intel® IQ80333 I/O Processor

 

 

 

 

 

Contents

Contents

 

 

 

 

 

 

 

1

Introduction

....................................................................................................................................

9

 

1.1

Document Purpose and Scope

9

 

1.2

Other Related Documents

9

 

1.3

Electronic Information

10

 

1.4

Component References

10

 

1.5

Terms and Definitions

11

 

1.6

Intel® 80333 I/O Processor

12

 

1.7

Intel® IQ80333 I/O Processor Evaluation Platform Board Features

14

2

Getting Started

15

 

2.1

Kit Content

15

 

2.2

Hardware Installation

15

 

 

2.2.1

First-Time Installation and Test

15

 

 

2.2.2

Power Requirements

16

 

2.3

Factory Settings

17

 

2.4

Development Strategy

17

 

 

2.4.1

Supported Tool Buckets

17

 

 

2.4.2

Contents of the Flash

17

 

2.5

Target Monitors

18

 

 

2.5.1

RedHat RedBoot

18

 

2.6

Host Communications Examples

19

 

 

2.6.1

Serial-UART Communication

19

 

 

2.6.2

JTAG Debug Communication

19

 

 

2.6.3

Network Communication

20

 

 

2.6.4

GNUPro GDB/Insight

21

 

 

 

2.6.4.1

Communicating with RedBoot

21

 

 

 

2.6.4.2

Connecting with GDB

23

3

Hardware Reference Section

25

 

3.1

Functional Diagram

25

 

3.2

Board Form-Factor/Connectivity

26

 

3.3

Power

..................................................................................................................................

27

 

3.4

Memory Subsystem

28

 

 

3.4.1

DDR SDRAM

28

 

 

 

3.4.1.1

Battery Backup

28

 

 

3.4.2

Flash Memory Requirements

29

 

3.5

Interrupt Routing

30

 

3.6

Intel® IQ80333 I/O Processor Evaluation Platform Board Peripheral Bus

31

 

 

3.6.1

Flash ROM

32

 

 

3.6.2

UART

33

 

 

3.6.3

Non-Volatile RAM

33

 

 

3.6.4

Audio Buzzer

33

 

 

3.6.5

HEX Display

33

 

 

3.6.6

Rotary Switch

33

 

 

3.6.7

Battery Status

34

 

3.7

Debug Interface

35

Image 3
Contents Customer Reference Board Manual Intel IQ80333 I/O ProcessorCustomer Reference Board Manual Contents Dram 2.2 Figures Tables Date Revision Description Revision HistoryOther Related Documents Document Purpose and ScopeComponent Reference Electronic InformationComponent References Electronic InformationTerms and Definitions Terms and DefinitionsDefinition Intel 80333 I/O Processor 231 Intel 80333 I/O Processor Block DiagramFeature Definition Summary of FeaturesKit Content Hardware InstallationFirst-Time Installation and Test Power Requirements Supported Tool Buckets Factory SettingsContents of the Flash Development StrategyTarget Monitors RedHat RedBootHost Communications Examples Serial-UART CommunicationJtag Debug Communication Network Communication Example Network CommunicationGNUPro GDB/Insight Communicating with RedBootIntel IQ80333 I/O Processor GDB set remotebaud Connecting with GDBThis Page Left Intentionally Blank Functional Diagram Target MarketPCI Express RAID card Board Form-Factor/Connectivity Form-Factor/Connectivity FeaturesPower Features PowerMemory Subsystem Battery BackupFlash Memory Requirements Flash Memory RequirementsExternal Interrupt Routing to Intel 80333 I/O Processor Interrupt Routing80333 populates the peripheral bus as depicted by Figure Peripheral Bus FeaturesFlash ROM Features Flash ROMFlash Connection on Peripheral Bus Audio Buzzer Rotary SwitchUart Non-Volatile RAMBattery Status Battery Status Buffer RequirementsName Description Console Serial Port Debug InterfaceJtag Debug Jtag PortJtag Port Pin-out Reset Requirements/Schemes Board Reset SchemeSwitch Summary Switches and JumpersSwitch Summary Default Switch Settings of S7A1- VisualConnector Summary Jumper SummaryGeneral Purpose Input/Output Header Switch S8A1 Rotary Detail Descriptions of Switches/JumpersSwitch S1C2 Intel 80333 I/O Processor Reset Switch S6A1 BPCI-X ResetSwitch S7A1-2 Reset IOP Settings and Operation Mode Switch S7A1-3 Retry Settings and Operation ModeS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode S7A1-8 Operation Mode S7A1-9 Operation ModeS7A1-10 Operation Mode Jumper J7D1 Flash bit-width Jumper J1C1 Jtag ChainJumper J1D2 Uart Control Jumper J7B4 SMBus Header Jumper J9D3 Buzzer Volume ControlComponents on the Peripheral Bus DramFlash Connection to Peripheral Bus Address Range in Hex Size Data Bus Width Description Peripheral Bus Memory MapIntel 80333 I/O Processor Memory Map Board Support Package BSP ExamplesRedBoot* Intel 80333 I/O Processor Memory Map RedBoot Intel 80333 I/O Processor FilesVirtual Address Physical Address Size Description Mov R8, r4 IQ80321 and IQ80333 Comparisons This Page Left Intentionally Blank Purpose IntroductionRelated Web Sites Hardware Setup SetupSoftware Flow Diagram Software SetupCreating a New Project New Project SetupConfiguration Overview Flashing with JtagUsing Flash Programmer Building an Executable File From Example Code Debugging Out of FlashLaunching and Configuring Debugger Running the CodeLab DebuggerManually Loading and Executing an Application Program Displaying Source Code Using BreakpointsStepping Through the Code Setting CodeLab Debug OptionsExploring the CodeLab Debug Windows Registers Window Watch WindowVariables Window Hardware Breakpoints Debugging BasicsHardware and Software Breakpoints Software BreakpointsExceptions/Trapping