Intel IQ80333 manual Target Monitors, RedHat RedBoot

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Intel® IQ80333 I/O Processor

Getting Started

2.5Target Monitors

2.5.1RedHat RedBoot

RedBoot* is an acronym for “RedHat Embedded Debug and Bootstrap”, and is the standard embedded system debug/bootstrap environment from RedHat, replacing the previous generation of debug firmware: CygMon and GDB stubs. It provides a bootstrap environment for a range of embedded operating systems, such as embedded Linux and eCos*, and includes facilities such as network downloading and debugging. It also provides a simple Flash file system for boot images.

RedBoot provides a set of tools for downloading and executing programs on embedded target systems, as well as tools for manipulating the target system's environment. It can be used for both product development (debug support) and for end product deployment (Flash and network booting).

Here are some highlights of RedBoot capabilities:

•Boot scripting support

•Simple command line interface for RedBoot configuration and management, accessible via serial (terminal) or Ethernet (telnet) (see Section 2.6.4, “GNUPro GDB/Insight” on page 21)

•Integrated GDB stubs for connection to a host-based debugger (GBD/Insight) via serial or Ethernet. (Ethernet connectivity is limited to local network only)

•Attribute Configuration - user control of aspects such as system time and date (when applicable), default Flash image to boot from, default fail-safe image, static IP address, etc.

•Configurable and extensible, specifically adapted to the target environment

•Network bootstrap support including setup and download, via BOOTP, DHCP and TFTP

•X/Y-Modem support for image download via serial

•Power On Self Test

18	Customer Reference Board Manual

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Contents Intel IQ80333 I/O Processor Customer Reference Board ManualCustomer Reference Board Manual Contents Dram 2.2 Figures Tables Revision History Date Revision DescriptionDocument Purpose and Scope Other Related DocumentsElectronic Information Electronic InformationComponent References Component ReferenceTerms and Definitions Terms and DefinitionsDefinition Intel 80333 I/O Processor Intel 80333 I/O Processor Block Diagram 231Summary of Features Feature Definition Kit Content Hardware Installation First-Time Installation and Test Power Requirements Development Strategy Factory SettingsContents of the Flash Supported Tool BucketsRedHat RedBoot Target MonitorsHost Communications Examples Serial-UART CommunicationJtag Debug Communication Network Communication Network Communication ExampleCommunicating with RedBoot GNUPro GDB/InsightIntel IQ80333 I/O Processor Connecting with GDB GDB set remotebaudThis Page Left Intentionally Blank Functional Diagram Target MarketPCI Express RAID card Form-Factor/Connectivity Features Board Form-Factor/ConnectivityPower Power FeaturesBattery Backup Memory SubsystemFlash Memory Requirements Flash Memory RequirementsInterrupt Routing External Interrupt Routing to Intel 80333 I/O ProcessorPeripheral Bus Features 80333 populates the peripheral bus as depicted by FigureFlash ROM Features Flash ROMFlash Connection on Peripheral Bus Non-Volatile RAM Rotary SwitchUart Audio BuzzerBattery Status Battery Status Buffer RequirementsName Description Debug Interface Console Serial PortJtag Debug Jtag PortJtag Port Pin-out Board Reset Scheme Reset Requirements/SchemesDefault Switch Settings of S7A1- Visual Switches and JumpersSwitch Summary Switch SummaryConnector Summary Jumper SummaryGeneral Purpose Input/Output Header Switch S6A1 BPCI-X Reset Detail Descriptions of Switches/JumpersSwitch S1C2 Intel 80333 I/O Processor Reset Switch S8A1 RotarySwitch S7A1-2 Reset IOP Settings and Operation Mode Switch S7A1-3 Retry Settings and Operation ModeS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode S7A1-8 Operation Mode S7A1-9 Operation ModeS7A1-10 Operation Mode Jumper J7D1 Flash bit-width Jumper J1C1 Jtag ChainJumper J1D2 Uart Control Jumper J9D3 Buzzer Volume Control Jumper J7B4 SMBus HeaderDram Components on the Peripheral BusFlash Connection to Peripheral Bus Peripheral Bus Memory Map Address Range in Hex Size Data Bus Width DescriptionBoard Support Package BSP Examples Intel 80333 I/O Processor Memory MapRedBoot* Intel 80333 I/O Processor Memory Map RedBoot Intel 80333 I/O Processor FilesVirtual Address Physical Address Size Description Mov R8, r4 IQ80321 and IQ80333 Comparisons This Page Left Intentionally Blank Introduction PurposeRelated Web Sites Setup Hardware SetupSoftware Setup Software Flow DiagramNew Project Setup Creating a New ProjectConfiguration Flashing with Jtag OverviewUsing Flash Programmer Debugging Out of Flash Building an Executable File From Example CodeLaunching and Configuring Debugger Running the CodeLab DebuggerManually Loading and Executing an Application Program Using Breakpoints Displaying Source CodeSetting CodeLab Debug Options Stepping Through the CodeExploring the CodeLab Debug Windows Registers Window Watch WindowVariables Window Software Breakpoints Debugging BasicsHardware and Software Breakpoints Hardware BreakpointsExceptions/Trapping