Intel IQ80333 manual Uart, Non-Volatile RAM, Audio Buzzer, HEX Display, Rotary Switch

Page 33

Intel® IQ80333 I/O Processor

Hardware Reference Section

3.6.2UART

The 80333 has two integrated UARTs. Each asynchronous serial ports supports all the functions of a 16550 UART. The UART signals are connected to a dual RS-232 buffer and then to a RJ-11 serial port connector mounted on the bracket of the evaluation board. The serial port and GPIO signals are muxed on the same pins. Jumper J1D2, located next to the serial port buffer can disable the buffer to allow the signals to be used as GPIO signals. Please see Section 3.9.3, “Jumper Summary” on page 39 for more details.

3.6.3Non-Volatile RAM

In addition to the 8MB Flash device, the IQ80333 has a separate 32 K by 8 non-volatile RAM device on the peripheral bus. The NVRAMs address range is from CE87 0000 to CE87 FFFF (in hex). Please see Section 4.2.2, “Peripheral Bus Memory Map” on page 47 for more details.

3.6.4Audio Buzzer

The 80333 evaluation board has an audio buzzer that is turned on and off by writing to the Buzzer Control Register located in the CPLD. Jumper J9D3 adjusts the volume from off, to soft, to loud. Please see Section 3.9.3, “Jumper Summary” on page 39 for more details. The audio buzzer’s address range is from CE86 0000 to CE86 FFFF (in hex). Please see Section 4.2.2, “Peripheral Bus Memory Map” on page 47 for more details.

3.6.5HEX Display

The two pairs of Agilent HDSP-A103 seven segment LEDs are used for displaying POST codes or other software generated debug codes. Both HEX displays are individually addressed. The left HEX display address range is CE84 0000 to CE84 FFFF (in hex). The right HEX display address range is CE85 0000 to CE85 FFFF (in hex). Please see Section 4.2.2, “Peripheral Bus Memory Map” on page 47 for more details.

3.6.6Rotary Switch

The 80333 provides a Rotary Switch (S8A1) for the user to select from different boot-up flavors. Setting ‘0’ enables private devices on the secondary PCI-X bus. Setting ‘0’ allows Redboot to configure and use devices in slot A. Position ‘1’ allows the host to see all the devices on the secondary PCI bus. The default setting is position 0. Other settings are currently not validated with Redboot. Other settings may be used with other software applications. Please see Section 4.2.2, “Peripheral Bus Memory Map” on page 47 for more details on addressing the rotary switch.

Table 12. Rotary Switch Requirements

Description

Rotary switch has a 4-bit resolution (16 positions).

The connection to the peripheral bus is depicted by Figure 7.

Default setting is ‘0’. This enables private devices on PCI-X bus.

Position ‘1’ allows host to see all devices on the secondary bus.

Customer Reference Board Manual

33

Image 33
Contents Customer Reference Board Manual Intel IQ80333 I/O ProcessorCustomer Reference Board Manual Contents Dram 2.2 Figures Tables Date Revision Description Revision HistoryOther Related Documents Document Purpose and ScopeComponent References Electronic InformationElectronic Information Component ReferenceTerms and Definitions Terms and DefinitionsDefinition Intel 80333 I/O Processor 231 Intel 80333 I/O Processor Block DiagramFeature Definition Summary of FeaturesKit Content Hardware InstallationFirst-Time Installation and Test Power Requirements Contents of the Flash Factory SettingsDevelopment Strategy Supported Tool BucketsTarget Monitors RedHat RedBootHost Communications Examples Serial-UART CommunicationJtag Debug Communication Network Communication Example Network CommunicationGNUPro GDB/Insight Communicating with RedBootIntel IQ80333 I/O Processor GDB set remotebaud Connecting with GDBThis Page Left Intentionally Blank Functional Diagram Target MarketPCI Express RAID card Board Form-Factor/Connectivity Form-Factor/Connectivity FeaturesPower Features PowerMemory Subsystem Battery BackupFlash Memory Requirements Flash Memory RequirementsExternal Interrupt Routing to Intel 80333 I/O Processor Interrupt Routing80333 populates the peripheral bus as depicted by Figure Peripheral Bus FeaturesFlash ROM Features Flash ROMFlash Connection on Peripheral Bus Uart Rotary SwitchNon-Volatile RAM Audio BuzzerBattery Status Battery Status Buffer RequirementsName Description Console Serial Port Debug InterfaceJtag Debug Jtag PortJtag Port Pin-out Reset Requirements/Schemes Board Reset SchemeSwitch Summary Switches and JumpersDefault Switch Settings of S7A1- Visual Switch SummaryConnector Summary Jumper SummaryGeneral Purpose Input/Output Header Switch S1C2 Intel 80333 I/O Processor Reset Detail Descriptions of Switches/JumpersSwitch S6A1 BPCI-X Reset Switch S8A1 RotarySwitch S7A1-2 Reset IOP Settings and Operation Mode Switch S7A1-3 Retry Settings and Operation ModeS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode S7A1-8 Operation Mode S7A1-9 Operation ModeS7A1-10 Operation Mode Jumper J7D1 Flash bit-width Jumper J1C1 Jtag ChainJumper J1D2 Uart Control Jumper J7B4 SMBus Header Jumper J9D3 Buzzer Volume ControlComponents on the Peripheral Bus DramFlash Connection to Peripheral Bus Address Range in Hex Size Data Bus Width Description Peripheral Bus Memory MapIntel 80333 I/O Processor Memory Map Board Support Package BSP ExamplesRedBoot* Intel 80333 I/O Processor Memory Map RedBoot Intel 80333 I/O Processor FilesVirtual Address Physical Address Size Description Mov R8, r4 IQ80321 and IQ80333 Comparisons This Page Left Intentionally Blank Purpose IntroductionRelated Web Sites Hardware Setup SetupSoftware Flow Diagram Software SetupCreating a New Project New Project SetupConfiguration Overview Flashing with JtagUsing Flash Programmer Building an Executable File From Example Code Debugging Out of FlashLaunching and Configuring Debugger Running the CodeLab DebuggerManually Loading and Executing an Application Program Displaying Source Code Using BreakpointsStepping Through the Code Setting CodeLab Debug OptionsExploring the CodeLab Debug Windows Registers Window Watch WindowVariables Window Hardware and Software Breakpoints Debugging BasicsSoftware Breakpoints Hardware BreakpointsExceptions/Trapping

IQ80333 specifications

The Intel IQ80333 is a high-performance microprocessor designed specifically for advanced networking, telecommunications, and industrial control applications. Known for its ability to deliver exceptional processing power while maintaining efficiency, the IQ80333 represents a key component in the evolution of embedded systems and real-time applications.

One of the principal features of the IQ80333 is its multi-core architecture. It is equipped with dual-core processing capabilities, allowing it to handle multiple tasks simultaneously. This multi-core setup leads to improved throughput and responsiveness, which is critical in environments that demand real-time data processing and robust multitasking.

The IQ80333 is built on Intel's x86 architecture, ensuring compatibility with a wide range of software applications. This feature is particularly valuable for system designers looking to leverage existing codebases while upgrading their hardware. The x86 architecture also supports a variety of operating systems, giving developers the flexibility to choose the most suitable environment for their applications.

In terms of performance, the IQ80333 boasts a clock speed that can reach up to 1.6 GHz. This high frequency, combined with a well-optimized pipeline and cache architecture, allows for swift execution of complex algorithms and processing-intensive tasks. The chip features a large L2 cache, which enhances its ability to manage memory operations and increases overall system performance.

Power efficiency is another standout characteristic of the Intel IQ80333. Designed for embedded applications, it incorporates features that reduce power consumption without sacrificing performance. This energy-efficient design is particularly important for devices operating in remote environments or where power availability is limited.

The IQ80333 also integrates advanced security technologies that are critical for maintaining data integrity in networked applications. Features such as secure boot and hardware-based encryption provide a robust foundation for creating secure systems, guarding against unauthorized access and ensuring the confidentiality of sensitive information.

Moreover, the microprocessor supports a range of interfaces, including PCI Express, USB, and SATA, allowing seamless integration into various systems and enabling connectivity with peripheral devices. This versatility makes the IQ80333 a preferred choice for developers looking to create customized solutions in networking and industrial applications.

In summary, the Intel IQ80333 combines high performance, energy efficiency, and robust security features, making it an ideal choice for modern embedded systems. Its multi-core architecture, support for x86 software, and advanced connectivity options provide engineers and developers with the tools they need to build sophisticated applications. Whether in telecommunications, industrial control, or networking, the IQ80333 continues to be a pivotal component in the advancement of technology in these fields.