Intel IMB200VGE Onboard Uart 3/4, Onboard Parallel Port, Parallel Port Mode, ECP mode Use DMA

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IMB200 LGA775 ATX MB User Manual

The choice: Half, Full.

zUR2 Duplex Mode

Half: Data is completely transmitted before receiving Data

Full: Transmits and receives data simultaneously.

zOnboard Parallel Port

378/IRQ7, 3BC/IRQ7, 278/IRQ5 Select the I/O address and IRQ for the onboard parallel port.

Disabled: Disables the onboard parallel port.

zParallel Port Mode

The options are SPP, EPP, ECP and ECP+EPP. These apply to a Standard specification and will depend on the type and speed of You device. Refer to your peripherals manual for the best option.

SPP – Allows normal speed operation but in one direction only.

ECP (Extended Capabilities Port) – Allow parallel port to operate in bidirectional mode and at a speed faster then the normal mode’s data transfer rate.

EPP (Enhanced Parallel Port) – Allows bidirectional parallel port operation at maximum speed.

zECP mode Use DMA

This is used to select a DMA channel of the parallel port.

7.6.4 Onboard UART 3/4

Use the onboard UART. In this mode you should use the Picasso SDK UART-functions. The. Data will be set to the RS- 232 a connector

Award Bios Utility

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Contents IMB200 Disclaimers ESD Precautions Installation Jumpers and ConnectorsChapter Introduction Hardware DescriptionChapter Installing LAN Driver Installing VGA driverChapter Award Bios Utility P e n d i x a Watchdog Timer P e n d i x B PCI IRQ RoutingPage General Description Introduction¾ CPU Socket LGA775 SpecificationsOrdering information Utilities SupportedBoard Dimensions Board Layout Jumpers and ConnectorsJumper Default Setting Jumper Setting Jumper SettingsClear Cmos Setting JP7 CF Power Setting JP9 CN7 ConnectorsPCI1~ CPU Installation InstallationInstallation Installation Installation Installation Installation Installation Installing the Memory Installing ATX Power SupplyInstallation Hardware Description General Output Connector CN37Enhance IDE1/IDE2 connecotor-IDE1 and IDE2 Display interface-CN1 Floppy Disk Connector-FDDParallel Port Connector COM1 Port Connector-CN2 Hardware Description Hardware Description USB USB USB USB Serial ATA Connectors-CN28/CN29 Hardware Description 16 CD/In Connector-CN9 17 CPU/System FAN Connector- CN23/CN24 Driver Disks’ Contents Installing VGA driverWindows 2000 VGA Driver Installation IntroductionPage Windows XP VGA Driver Installation Features Installing LAN DriverDrivers Supported Bios Introduction Award Bios UtilityBios Setup Page Standard Cmos Setup Time DateHalt On Drive a type/Drive B typeCPU Feature Advanced Bios FeaturesExecute Disable Bit Delay prior to ThermalThermal Management Limited Cupid MaxValVirus Warning Quick Power On Self TestBoot Other Device First/Second/Third Boot DeviceBoot Up Floppy Seek Swap Floppy DriveApic Mode Boot Up NumLock StatusDarm Timing Selectable Advanced Chipset FeaturesDram RAS# to CAS# Delay Active Precharge DelaySystem Bios Cacheable Video Bios CacheableAGP Aperture Size MB Memory Hole At 15M-16MInit Display First On-Board Frame Buffer Size On-Chip VGAOn-Chip IDE Device Integrated PeripheralsIDE Primary Master PIO On-Chip Primary PCI IDEIDE Primary Slave PIO IDE Primary Master UdmaOn-Chip Serial ATA Onboard DeviceUSB 2.0 Controller USB ControllerUSB Keyboard Support AC97 AudioUR2 Duplex Mode Uart Mode SelectSuper IO Device Onboard FDC ControllerECP mode Use DMA Parallel Port ModeOnboard Uart 3/4 Onboard Parallel PortSpread Spectrum Onboard Uart 3/4 IRQPower Management Power Management SetupAcpi Function Acpi Suspend TypeHDD Power Down Suspend ModeVideo Off Method Video Off In SuspendWake-Up By PCI card Power On function„ PWN After PWR-Fail PNP OS Installed PNP/PCI ConfigurationReset Configuration Data „ PCI /VGA Palette Snoop „ Resource controlled byPC Health Status System FAN2 Speed Frequency/Voltage Control+3.3V/+5V/+12V/-12V/-5V/VBATV/5VSB CPU Clock RatioLoad Optimized Default Load Fail-Safe DefaultSupervisor/User Password Setting Enter Password Save to Cmos and Exit Y/N? Y Exit SettingQuit without saving Y/N? Y P e n d i x a Watchdog Timer P e n d i x B PCI IRQ Routing AppendixC Detailed memory Addess Mapping AppendixD I/O Shield