Intel E7520 user manual Power Diagram, ITP location

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Dual-Core Intel Xeon processor LV / E7520 Chipset / 6300ESB ICH

Figure 15. ITP location

3.3.9Power Diagram

Figure 16 shows the power distribution for the CRB. Refer to the CRB schematics for details on the power distribution logic (contact your Intel field sales representative to obtain the schematics).

Dual-Core Intel® Xeon® processor LV with Intel® E7520 Chipset and Intel® 6300ESB ICH

 

User’s Manual

April 2007

30

Order Number: 311274-009

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Contents User’s Manual AprilPage Contents Figures Tables Revision History Date Revision DescriptionContent Overview About This ManualText Conventions Page Technical Support Electronic Support Systems Online DocumentsAdditional Technical Support Product Literature Related DocumentsGetting Started OverviewEvaluation Board Features Software Key FeaturesIncluded Hardware Before You Begin Setting up the Evaluation BoardAMIBIOS* for the Development Kit Additional HardwareSafety Package ContentsHeatsink Information Installed HardwareInstalling the Heatsinks for CPUs and MCH EEP-N41CS-I1-GPCPU Heatsink Installation Location for the CPU and MCH for Heatsink InstallationCPU Heatsink Top and Bottom View Clean Top of Processor Die Back Plate in Place MCH Heatsink Installation Screw Tightening OrderClean Top of MCH Die Installing Memory Installing Storage DevicesConnect the Video Card and Monitor Power up the System Configuring the BiosConnect the Power Supply Connect the Keyboard and MouseBlock Diagram Theory of OperationThermal Management System Features Dual-Core Intel Xeon processor LV Intel E7520 MCH and Intel 6300ESB ICH ChipsetSupported Dimm Module Types Memory Population Rules and ConfigurationsMemory Subsystem Supported Dimm Module TypesBoot ROM Intel 82802AC Firmware Hub FWHIn-Target Probe ITP Power Diagram ITP locationPower Distribution Block Diagram Clock GenerationPlatform Resets Clock Block DiagramPlatform Reset Diagram SMBusSMBus Block Diagram Platform IRQ RoutingIRQ Routing Diagram VRD VID HeadersBattery Requirements Processor VRD SettingsPower Button Platform ManagementSleep States Supported Wake-Up Events 5 S4 State6 S5 State Wake from S1 Sleep StateSystem Fan Operation PCI PM SupportPlatform Management Wake from S5 StateDriver and OS Support Hardware Reference Evaluation BoardExpansion Slots and Sockets PCI Express* ConnectorChipset Components Chipset ComponentsPCI Express* Connector Pinout Sheet 2 2 32-Bit PCI Connector Bit 5 V PCI Connector Pinout Sheet 1PCI-X Connector Bit 5 V PCI Connector Pinout Sheet 2PCI-X Connector Pinout Sheet 1 CBE1# PCI-X Connector Pinout Sheet 2Pcixcap M66ENPCI-X Connector Pinout Sheet 3 PAR64Battery On-Board ConnectorsFirmware Hub FWH Bios Socket Processor SocketsSata Connector Pinout Sata ConnectorIDE Connector IDE Connector PinoutFloppy Drive Connector Front Panel ConnectorFloppy Drive Connector Pinout Jumpers Jumpers and Jumper FunctionsJumper Locations Smbus Headers Back Panel Connectors1 PS/2-Style Mouse and Keyboard Connectors Parallel PortSerial Port Connector Pinout Dual Stacked USB ConnectorsParallel Port Connector Pinout USB Connector PinoutVideo Port Connector Pinout Video PortBoard Setup Checklist Level 2 Debug Power Sequence Debug ProcedureLevel 1 Debug Port80/BIOS Level 2 Debug Power SequenceLevel 3 Debug Voltage References Level 3 Debug Voltage Reference