Intel E7520 user manual

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Dual-Core Intel Xeon processor LV / E7520 Chipset / 6300ESB ICH

they are collectively called CSn#. A pound symbol (#) appended to a signal name identifies an active-low signal. Port pins are represented by the port abbreviation, a period, and the pin number (e.g., P1.0).

Dual-Core Intel® Xeon® processor LV with Intel® E7520 Chipset and Intel® 6300ESB ICH
User’s Manual	April 2007
8	Order Number: 311274-009

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Contents User’s Manual AprilPage Contents Figures Tables Revision History Date Revision DescriptionText Conventions Content OverviewAbout This Manual Page Additional Technical Support Technical SupportElectronic Support Systems Online Documents Product Literature Related DocumentsGetting Started OverviewIncluded Hardware Evaluation Board FeaturesSoftware Key Features Setting up the Evaluation Board AMIBIOS* for the Development KitBefore You Begin Additional HardwareSafety Package ContentsInstalled Hardware Installing the Heatsinks for CPUs and MCHHeatsink Information EEP-N41CS-I1-GPCPU Heatsink Installation Location for the CPU and MCH for Heatsink InstallationCPU Heatsink Top and Bottom View Clean Top of Processor Die Back Plate in Place MCH Heatsink Installation Screw Tightening OrderClean Top of MCH Die Installing Memory Installing Storage DevicesConnect the Video Card and Monitor Configuring the Bios Connect the Power SupplyPower up the System Connect the Keyboard and MouseThermal Management Block DiagramTheory of Operation System Features Dual-Core Intel Xeon processor LV Intel E7520 MCH and Intel 6300ESB ICH ChipsetMemory Population Rules and Configurations Memory SubsystemSupported Dimm Module Types Supported Dimm Module TypesIn-Target Probe ITP Boot ROMIntel 82802AC Firmware Hub FWH Power Diagram ITP locationPower Distribution Block Diagram Clock GenerationPlatform Resets Clock Block DiagramPlatform Reset Diagram SMBusSMBus Block Diagram Platform IRQ RoutingIRQ Routing Diagram VRD VID HeadersBattery Requirements Processor VRD SettingsSleep States Supported Power ButtonPlatform Management 5 S4 State 6 S5 StateWake-Up Events Wake from S1 Sleep StatePCI PM Support Platform ManagementSystem Fan Operation Wake from S5 StateDriver and OS Support Hardware Reference Evaluation BoardPCI Express* Connector Chipset ComponentsExpansion Slots and Sockets Chipset ComponentsPCI Express* Connector Pinout Sheet 2 2 32-Bit PCI Connector Bit 5 V PCI Connector Pinout Sheet 1PCI-X Connector Pinout Sheet 1 PCI-X ConnectorBit 5 V PCI Connector Pinout Sheet 2 PCI-X Connector Pinout Sheet 2 PcixcapCBE1# M66ENPCI-X Connector Pinout Sheet 3 PAR64On-Board Connectors Firmware Hub FWH Bios SocketBattery Processor SocketsSata Connector IDE ConnectorSata Connector Pinout IDE Connector PinoutFloppy Drive Connector Pinout Floppy Drive ConnectorFront Panel Connector Jumpers Jumpers and Jumper FunctionsJumper Locations Back Panel Connectors 1 PS/2-Style Mouse and Keyboard ConnectorsSmbus Headers Parallel PortDual Stacked USB Connectors Parallel Port Connector PinoutSerial Port Connector Pinout USB Connector PinoutVideo Port Connector Pinout Video PortBoard Setup Checklist Debug Procedure Level 1 Debug Port80/BIOSLevel 2 Debug Power Sequence Level 2 Debug Power SequenceLevel 3 Debug Voltage References Level 3 Debug Voltage Reference