Intel Raptor AT manual Designing for thermal performance, Fan Heatsink

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Chapter 1: Pre-Configuration

Locate the CPU socket on your Raptor AT system board (PGA Socket

Location U21 – Figure 1-2). To install the processor, lift the lever of the ZIF socket and gently insert the CPU. The CPU will fit only in the right alignment. Make sure the CPU is inserted all the way. Lower the lever. Install the CPU fan. Make sure it is locked and connected to J3 (see pin-out in Appendix A).

The continued push of technology to increase performance levels (higher operating speeds) and packaging density (more transistors) is aggravating the thermal management of the CPU. As operating frequencies increase and packaging sizes decreases, the power density increases and the thermal cooling solution space and airflow become more constrained. The result is an increased importance on system design to ensure that thermal design requirements are met for the CPU.

The objective of thermal management is to ensure that the temperature of the processor is maintained within functional limits. The functional temperature limit is the range within which the electrical circuits can be expected to meet their specified performance requirements. Operation outside the functional limit can degrade system performance, cause logic errors or cause component and/or system damage. Temperatures exceeding the maximum operating limits may result in irreversible changes in the operating characteristics of the component.

If the Raptor AT industrial embedded motherboard is acquired without the CPU and the thermal solution, extremely care must be taken to avoid improper thermal management. All Intel thermal solution specifications, design guidelines and suggestions to the CPU being used must be followed. The Raptor AT warranty is void if the thermal management does not comply with Intel requirements.

Designing for thermal performance

In designing for thermal performance, the goal is to keep the processor within the operational thermal specifications. The inability to do so will shorten the life of the processor.

Fan Heatsink

An active fan heatsink can be employed as a mechanism for cooling the Intel processors. This is the acceptable solution for most chassis. Adequate clearance must be provided around the fan heatsink to ensure unimpeded air flow for proper cooling.

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Contents Raptor AT Page Chapter Pre-ConfigurationAppendix B Flash Bios Programming Appendix C Disk-On-Chip Appendix a Technical SpecificationsAppendix E On-Board Appendix D On-Board IndustrialRaptor AT Installation Guide Introduction System Board Pre-ConfigurationStatic Electricity Warning On-Board I/O CPU SupportSupported Bus Clocks MemoryOn-Board Ethernet Conventions Used in this ManualStatic Warning Pre-ConfigurationRaptor AT Installation Guide Jumper Types Jumper Locations Jumper LocationsFlash Write-protect Enabled Disabled Cmos ResetReset Cmos Normal Clear Cmos Flash Bios Write ProtectClock JP11 Watchdog Timer SelectionTimeout Clock Speed SelectionATX Power Supply Enhancements Ethernet Selection Enabled DisabledAddress 110h Closed Open 310h CPU Installation Raptor AT Memory ConfigurationFan Heatsink Designing for thermal performanceAirflow management Disk-on-Chip installationInstalling Cables Power and Control Panel Cables Installing Peripheral CablesPre-Configuration Location of Components and Connectors Connector Description Index of ConnectorsUsers Notes Bios Setup Main Menu SetupStarting Bios Setup Using the Keyboard with Bios SetupDate/Time Standard SetupFloppy Drive A, B Pri Master Pri Slave Sec Master Sec Slave Advanced Cmos SetupBoot Sector Virus Protection Quick BootHard Disk Access Control Try Other Boot DevicesInitial Display Mode Floppy Access ControlFloppy Drive Seek Boot Up Num LockA.R.T. for Hard Disks Floppy Drive SwapPrimary Display Password CheckBoot to OS/2 Wait for F1 If ErrorC000,16K Shadow C400,16K Shadow Advanced Chipset SetupSystem Bios Cacheable Internal CacheUSB KB/Mouse Legacy Support BX/GX Master Latency Timer ClksMulti-Trans Timer Clks PCI 1 to PCI 0 AccessSdram RAS# to CAS# Delay Aperture Access Global EnablePCI 0 Agent to Aperture Access Memory Autosizing Support Dram Integrity ModeSdram Precharge Control Power Down SdramSearch for MDA Resources Bit I/O Recovery Time 16bit I/O Recovery TimePower Management Setup Video Power Down Mode Power Management/APMPower button Function Green PC Monitor Power StateSuspend Timeout Power Saving TypeStandby / Suspend Timer Unit Standby TimeoutPlug and Play Aware OS PCI/Plug and Play SetupPCI Latency Timer PCI Clocks LAN Wake-UpOff-board PCI IDE Card PCI VGA Palette SnoopAllocate IRQ to PCI VGA PCI IDE Bus MasterDMA Channel Off-board PCI IDE Secondary IRQPCI Device Search Order Peripheral SetupReserved Memory Size Reserved Memory AddressOnboard Serial Port1 Serial Port2 ModeInfra-Red Transmission Mode Parallel Port ModeParallel Port IRQ CPU Current TemperatureCPU Overheat Warning Temperature EPP VersionOnboard IDE Change User PasswordAuto Detect Hard Disk CPU Fan Secondary FanChange Supervisor Password Save Settings and Exit Auto Configuration with Fail-Safe SettingsExit without Saving Upgrading the System Memory Chapter UpgradingUpgrading the Microprocessor Users Notes Appendix a BiosSystem Memory Embedded I/O Miscellaneous Industrial DevicesPCB Construction Control Panel ConnectionsCPU Socket Form FactorData Width System Resource Memory MapDMA Channels Address Range Size Description Decimal HexadecimalAddress hex Description MapOn-board Devices PCI Configuration Space MapBus # Device # Function # Description Interrupts SignalPCI Interrupt Routing Map Device Slave Address Connectors Pin-outEthernet Header J31 Pin# Serial Ports DB9M J36 and J37Pin# Pin# Parallel DB25F J13HDD LED Appendix B Flash Bios Programming Beeps Description Appendix C Disk-On-Chip Users Notes Appendix D On-Board Industrial Devices Watchdog TimerHardware Reset Software ResetPost Code Display AddressCheckpoint Description Code Post Checkpoint CodesTable D-5 Bootblock Recovery Codes Table D-6 Uncompressed Initialization Codes Memory refresh line is toggling. Checking 3Ah Performing the DMA controller 2 base register test next Winbios Adaptor ROM had control and has now returned Table D-7 Bus Checkpoint Codes Bits Description Appendix E On-Board Ethernet Users Notes Page MN-RBXAT-03