IBM EM78P809N manual AD Converter, → Don’t care → Interrupt request flag will be recorded

Page 33

EM78P809N

8-Bit Microcontroller

 

 

SLEEP Mode

IDLE Mode

 

NORMAL

Wake-up Signal

 

R5 (SIS) = 1+SLEP

R5 (SIS)= 0 + SLEP

 

Mode

 

 

Instruction

Instruction

 

R5 (SIS)=(*)

1. Individual interrupt source

 

 

1. Wake-up

 

 

 

 

2. Jump to an Interrupt

 

 

in IMR1, IMR2

 

No effect

 

 

2. WDT interrupt request

 

vector after RETI

 

Interrupt

 

(**)

instruction, then jump

 

3. /INT0

 

 

to the next instruction

 

 

4. Execute ENI instruction

 

 

 

 

 

 

or enter IDLE mode

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1. Wake-up

 

 

 

/SLEEP pin

 

2. Jump to the next

No effect

 

No effect

 

instruction or

 

 

 

enter SLEEP

 

 

 

 

 

mode

 

 

 

 

 

 

 

 

 

/RESET pin

 

Reset

Reset

 

Reset

 

 

 

 

 

 

WDT time out

 

Reset

Reset

 

Reset

 

 

 

 

 

 

*Don’t care

**Interrupt request flag will be recorded

4.5AD Converter

Registers for AD Converter Circuit

R_BANK

Address

 

NAME

 

Bit 7

 

Bit 6

 

Bit 5

 

Bit 4

 

Bit 3

 

Bit 2

 

Bit 1

 

Bit 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BANK 1

0X0B

 

ADCR

 

ADREF

 

ADRUN

 

ADCK1

 

ADCK0

 

ADP

 

ADIS2

 

ADIS1

 

ADIS0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BANK 1

0X0C

 

ADIC

 

ADE7

 

ADE6

 

ADE5

 

ADE4

 

ADE3

 

ADE2

 

ADE1

 

ADE0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BANK 1

0X0D

 

ADDH

 

ADD9

 

ADD8

 

ADD7

 

ADD6

 

ADD5

 

ADD4

 

ADD3

 

ADD2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

 

R

 

R

 

R

 

R

 

R

 

R

 

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BANK 1

0X08

 

ADDL

 

ADD1

 

ADD0

 

0

 

TC2M

 

TC2S

 

TC2CK

 

TC2CK

 

TC2CK

 

 

 

 

 

 

 

2

 

1

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

 

R

 

--

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BANK 0

0x0E

 

ISFR1

 

EXIF5

 

TCIF2

 

ADIF

 

0

 

EXIF3

 

TCIF4

 

SPIF

 

TCIF3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

 

0

 

R/W

 

R/W

 

R/W

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPR

0x0C

 

ADOSCR

 

CALI

 

SIGN

 

VOF[2]

 

VOF[1]

 

VOF[0]

 

0

 

0

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

 

R/W

 

R/W

 

--

 

--

 

--

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPR

0x0E

 

IMR1

 

EXIE5

 

TCIE2

 

ADIE

 

0

 

EXIE3

 

TCIE4

 

SPIE

 

TCIE3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

R/W

 

R/W

 

0

 

R/W

 

R/W

 

R/W

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*R_BANK : Register Bank (bits 7, 6 of R3), R/W: Read / Write

*SPR : Special Purpose Registers

Product Specification (V1.0) 07.26.2005

29

(This specification is subject to change without further notice)

Image 33
Contents DOC. Version EM78P809NElan Microelectronics Corporation Contents Specification Revision History Bit Microcontroller CPU„ General purpose ApplicationsPin Assignment OTP Programming Pins Function Description Functional Block DiagramTbktc Operating RegistersR2/PC − Program Counter & Stack Address 02h R1/TCC − Time Clock /Counter Address 01hBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select R3/SR − Status Register Address 03hBit 5 Not used RBS1 RBS0Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04h GRBS1 GRBS0General Purpose Register Bank Address 20H ~ 3FH PORT6 − Port 6 I/O Data Register Address 06h SIS = 0 Idle mode SIS = 1 Sleep modePORT7 Port 7 I/O Data Register Address 07h PORT8 − Port 8 I/O Data Register Address 08hTC4S = 1 Start TC4CR Timer/Counter 4 Control Register Address 0BhTC4FF1 TC4FF0 TC4CK2 TC4CK1 TC4CK0ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0ChTC3CAP = Bit 7 TC3CAP Software capture controlTC3S = 1 Start TC3CAP TC3S TC3CK1 TC3CK0 TC3MTC2M = 1 Window mode TC3DB − Timer 3 Data Buffer B Address 07hBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC2S = 1 StartTC2DH − Timer 2 Data Buffer High Byte Address 09h TC2DL − Timer 2 Data Buffer Low Byte Address 0AhAdcr − AD Control Register Address 0Bh Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 3 ADP AD power controlAdic − AD Input Pin Control Address 0Ch Addh − AD High 8-bit Data Buffer Address 0DhTEN = 0 Disable TEN = 1 Enable Bit 7 TEN Keytone enable controlBit 3 Tbten Time Base Timer Enable Control Bit Microcontroller Tbktc − TBT/Keytone Control Address 0EhUinven = 0 Disable TXD and RXD port inverse output Bit 3 Uinven Enable Uart TXD and RXD port inverse outputUinven = 1 Enable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate SelectBit 5 PRE Enable parity addition Bit Microcontroller URS − Uart Status Register Address 07hEven = 0 Odd parity Even = 1 Even parity EDS = 0 Rising edge EDS = 1 Falling edge Bit 2 EDS Data shift out edge selectSMP Dcol BRS2 BRS1 EDS Dord WBESPIC2 − SPI Control Register 2 Address 06h Transfer ModeSpid SPI Data Buffer Address 07h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0PLC1 Pull Low Control Register 1 Address 0Bh PLE7x = 1 Disable P7x pull lowPHC2 − Pull High Control Register 2 Address 0Ch PLC2 − Pull Low Control 2 Address 0DhAccumulator Special Purpose RegistersControl Register Bit 7 Wdto WDT output selectIntcr − INT Control Register Address 0Bh Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control RegisterBit 2 Reserved INT1ES = 0 Rising edge INT1ES = 1 Falling edgeExternal Interrupt INT Pin Secondary Enable Condition Function PinAdoscr − AD Offset Control Register Address 0Ch EdgeUerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRegisters for CPU operation mode CPU Operation ModeRbank Register Bank bits 7, 6 of R3, R/W Read/Write RbankMode Switching Control Operation ModeNormal AD Converter → Don’t care → Interrupt request flag will be recordedRegisters for AD Converter Circuit ADC Data Register Sampling TimeConversion Time Time Base Timer and Keytone Generator ADCK10Max. Frequency Max. Conversion Rate per Bit Tone Output Pin Timing Chart Uart Universal Asynchronous Receiver/Transmitter Registers for Uart CircuitRbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Data Format in Uart Uart ModeReceiving TransmittingSPI Serial Peripheral Interface Baud Rate GeneratorRegisters for the SPI Circuit Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial ClockBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeMultiple Device Connect /SS SCK pinTimer/Counter Registers for Timer/Counter 2 CircuitRbank Address Name Bit 7 Bit 6 Bit Timer Mode Counter ModeWindow Mode Registers for Timer/Counter 3 Circuit Window Mode Timing ChartConfiguration of Timer/Counter3 Capture modeTCIF4 Registers for Timer 4 CircuitTCR4 PDO ModePWM Mode 12 TCC/WDT & PrescalerTC4 Interrupt Reset and Wake-up Reset13 I/O Ports Wake-up from Sleep Mode Wake-up from Idle modeAll interrupt Summary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankTC2D9 TC2D8 Register Bank Reset Type Previous value before resetStatus of RST, T, and P of Status Register Bit Microcontroller General Purpose RegistersInterrupt Controller Reset Block DiagramOscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating SpeedsEM78P809N Oscillator Type Frequency Mode C1 pF C2 pFExt. Clock 740Crystal/Resonator-Parallel Mode Circuit External RC Oscillator ModeCode Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word For design reference onlyExternal Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register Cyes = 0 One cycle Cyes = 1 Two cyclesVdd Residue-Voltage ProtectionEM78P809N Rin Vdd EM78P809NVdd 40KR2 Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedAbsolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss =DC Electrical Characteristics Ta= 25 C, VDD= 5.0V ± 5%, VSS=Typical value is based on characterization results at 25C Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V = selected prescaler ratioAC Test Input/Output Waveform Timing DiagramPackage Types OTP MCUPin Count Package Size Contents III EM78P809N