IBM EM78P809N manual Interrupt, Controller Reset Block Diagram

Page 58

EM78P809N

8-Bit Microcontroller

	VDD
Oscillator	D	Q	CLK
	CLK		CLK
	CLK
	CLR

Power-on

Reset

Voltage

Detector

WDTE

WDT	WDT Timeout	Setup Time	RESET

/RESET

Fig. 29.Controller Reset Block Diagram

4.15 Interrupt

The EM78P809N has 15 interrupts (9 external, 6 internal) listed below:

Table 9.. Interrupt Vector

	Interrupt Source		Enable Condition	Int. Flag	Int. Vector	Priority
	Interrupt Source		Enable Condition	Int. Flag	Int. Vector	Priority

	Internal /	Reset	-	-	0000	High 0
	External	Reset	-	-	0000	High 0
	External

	Internal	WDT	WDTEN	WDTIF	0003	1

	External	INT0	ENI + INT0EN=1	EXIEF0	0006	2

	Internal	TCC	ENI + TCIE0=1	TCIF0	0009	3

	External	INT1	ENI + EXIE1=1	EXIF1	000F	4

	Internal	TBT	ENI + TBIE=1	TBIF	0012	5

	External	UART Transmit	ENI + UTIE=1	TBEF	0015	6

	External	UART Receive	ENI + URIE=1	TBFF	0018	7

	External	UART Receive error	ENI+UERRIE=1	UERRIF	001B	8

	Internal	TC3	ENI + TCIE3=1	TCIF3	0021	9

	External	SPI	ENI + SPIE=1	SPIF	0024	10

	Internal	TC4	ENI + TCIE4=1	TCIF4	0027	11

	External	INT3	ENI + EXIE3=1	EXIF3	002A	12

	External	AD	ENI + ADIE=1	ADIF	0030	13

	Internal	TC2	ENI + TCIE2=1	TCIF2	0033	14

	External	INT5	ENI + EXIE5=1	EXIF5	0036	Low 15

	ISFR0, ISFR1 and ISFR2 are the interrupt status registers that record the interrupt
	requests in the relative flags/bits. IMR1 and IMR2 are the interrupt mask registers. The
	global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction.

54 •	Product Specification (V1.0) 07.26.2005

(This specification is subject to change without further notice)

Image 58

Contents EM78P809N DOC. VersionElan Microelectronics Corporation Contents Specification Revision History CPU Bit MicrocontrollerApplications „ General purposePin Assignment OTP Programming Pins Functional Block Diagram Function DescriptionOperating Registers TbktcR1/TCC − Time Clock /Counter Address 01h R2/PC − Program Counter & Stack Address 02hBit 5 Not used R3/SR − Status Register Address 03hBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select RBS1 RBS0GRBS1 GRBS0 Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04hGeneral Purpose Register Bank Address 20H ~ 3FH PORT7 Port 7 I/O Data Register Address 07h SIS = 0 Idle mode SIS = 1 Sleep modePORT6 − Port 6 I/O Data Register Address 06h PORT8 − Port 8 I/O Data Register Address 08hTC4FF1 TC4FF0 TC4CR Timer/Counter 4 Control Register Address 0BhTC4S = 1 Start TC4CK2 TC4CK1 TC4CK0Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0Ch ISFR1 − Interrupt Status Flag Register 1 Address 0EhTC3S = 1 Start Bit 7 TC3CAP Software capture controlTC3CAP = TC3CAP TC3S TC3CK1 TC3CK0 TC3MBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC3DB − Timer 3 Data Buffer B Address 07hTC2M = 1 Window mode TC2S = 1 StartTC2DL − Timer 2 Data Buffer Low Byte Address 0Ah TC2DH − Timer 2 Data Buffer High Byte Address 09hAdcr − AD Control Register Address 0Bh Adic − AD Input Pin Control Address 0Ch Bit 3 ADP AD power controlBit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Addh − AD High 8-bit Data Buffer Address 0DhBit 3 Tbten Time Base Timer Enable Control Bit 7 TEN Keytone enable controlTEN = 0 Disable TEN = 1 Enable Bit Microcontroller Tbktc − TBT/Keytone Control Address 0EhUinven = 1 Enable TXD and RXD port inverse output Bit 3 Uinven Enable Uart TXD and RXD port inverse outputUinven = 0 Disable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate SelectBit Microcontroller URS − Uart Status Register Address 07h Bit 5 PRE Enable parity additionEven = 0 Odd parity Even = 1 Even parity SMP Dcol BRS2 BRS1 Bit 2 EDS Data shift out edge selectEDS = 0 Rising edge EDS = 1 Falling edge EDS Dord WBESpid SPI Data Buffer Address 07h Transfer ModeSPIC2 − SPI Control Register 2 Address 06h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0PHC2 − Pull High Control Register 2 Address 0Ch PLE7x = 1 Disable P7x pull lowPLC1 Pull Low Control Register 1 Address 0Bh PLC2 − Pull Low Control 2 Address 0DhControl Register Special Purpose RegistersAccumulator Bit 7 Wdto WDT output selectBit 2 Reserved Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control RegisterIntcr − INT Control Register Address 0Bh INT1ES = 0 Rising edge INT1ES = 1 Falling edgeAdoscr − AD Offset Control Register Address 0Ch INT Pin Secondary Enable Condition Function PinExternal Interrupt EdgeIMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0Rbank Register Bank bits 7, 6 of R3, R/W Read/Write CPU Operation ModeRegisters for CPU operation mode RbankOperation Mode Mode Switching ControlNormal → Don’t care → Interrupt request flag will be recorded AD ConverterRegisters for AD Converter Circuit Sampling Time ADC Data RegisterConversion Time ADCK10 Time Base Timer and Keytone GeneratorMax. Frequency Max. Conversion Rate per Bit Tone Output Pin Timing Chart Registers for Uart Circuit Uart Universal Asynchronous Receiver/TransmitterRbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Mode Data Format in UartTransmitting ReceivingBaud Rate Generator SPI Serial Peripheral InterfaceRegisters for the SPI Circuit Bit Transmit Mode Shift Direction and Sample PhaseTransfer Mode Serial ClockBit Microcontroller Bit Receive Mode Bit Transmit/Receive ModeSCK pin Multiple Device Connect /SSRegisters for Timer/Counter 2 Circuit Timer/CounterRbank Address Name Bit 7 Bit 6 Bit Counter Mode Timer ModeWindow Mode Window Mode Timing Chart Registers for Timer/Counter 3 CircuitCapture mode Configuration of Timer/Counter3Registers for Timer 4 Circuit TCIF4PDO Mode TCR412 TCC/WDT & Prescaler PWM ModeTC4 Interrupt Reset Reset and Wake-up13 I/O Ports Wake-up from Idle mode Wake-up from Sleep ModeAll interrupt Address Name Reset Type Bit Summary of the Initialized Values for RegistersBit Microcontroller Register Bank SCRTC2D9 TC2D8 Register Bank Status of RST, T, and P of Status Register Previous value before resetReset Type Bit Microcontroller General Purpose RegistersController Reset Block Diagram InterruptCrystal Oscillator/Ceramic Resonators Crystal OscillatorOscillator Modes Summary of Maximum Operating SpeedsExt. Clock Oscillator Type Frequency Mode C1 pF C2 pFEM78P809N 740External RC Oscillator Mode Crystal/Resonator-Parallel Mode CircuitCode Option Register Word Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register For design reference onlyCustomer ID Register Power-on ConsiderationsExternal Power-on Reset Circuit Cyes = 0 One cycle Cyes = 1 Two cyclesEM78P809N Rin Residue-Voltage ProtectionVdd Vdd EM78P809NInstruction Set Vdd 40KR2Binary Instruction Hex Mnemonic Operation Status Affected DECRecommended Operating Conditions Symbol Parameter Condition Min Typ Max UnitAbsolute Maximum Ratings Vss =Ta= 25 C, VDD= 5.0V ± 5%, VSS= DC Electrical CharacteristicsTypical value is based on characterization results at 25C Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Ta=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V AC Electrical CharacteristicSymbol Parameter Conditions Min Typ Max Unit = selected prescaler ratioTiming Diagram AC Test Input/Output WaveformOTP MCU Package TypesPin Count Package Size Contents III EM78P809N