IBM EM78P809N Serial Clock, Shift Direction and Sample Phase, Transfer Mode, Bit Transmit Mode

Page 41

EM78P809N

8-Bit Microcontroller

The serial interface are connected to external devices via P70 (/SCK), P71 (SI), P72 (SO). The serial interface can also be used as I/O port. In the transmit mode, P71 can be used as normal I/O port and in receive mode, P72 and P71 can be used as normal I/O ports.

4.8.1 Serial Clock:

Six internal clocks can be selected by setting BRS0 ~ BRS2 and the clock output to the outside from /SCK (P70) pin. The External clock can also be used and connected to /SCK (P70) pin.

4.8.2 Shift Direction and Sample Phase:

Setting up the DORD bit of the SPIC1 register can determine the shift direction. Setting up the EDS bit of the SPIC1 register can select the rising edge or falling edge and latch the data. Setting up the SMP bit of the SPIC2 register can select the sample phase at the middle or at the end of the data output time.

4.8.3 Transfer Mode:

The transmit, receive, transmit/receive mode can be selected by setting SPIM0 ~ SPIM1.

(a) 8-bit Transmit Mode:

Set SPIM0 ~ SPIM12 to transmit mode and write data to the data buffer SPID. Set SPIS to “1” to start transmission. The data are output sequentially to the SO pin in synchronous with the serial clock. When the final bit of transfer data has been transferred, the SPI interrupt is generated and SPIS is cleared to “0” by hardware. In order to transmit the next data, the SPIS must be set to “1” again by software. If the next data is not written to the data buffer, the transfer is not started when using the internal clock.

shift start

shift start

SPIS

RBF

WBE

SO pin

SPIF SPID a

			shift finish
a0	a1	a2	a3	a4	a5	a6	a7	b0 b1 b2 b3 b4 b5 b6 b7
								b
write data								write data

Fig. 15. Transmit Mode (8-bit, 1 word)

Product Specification (V1.0) 07.26.2005

• 37

(This specification is subject to change without further notice)

Image 41

Contents DOC. Version EM78P809NElan Microelectronics Corporation Contents Specification Revision History Bit Microcontroller CPU„ General purpose ApplicationsPin Assignment OTP Programming Pins Function Description Functional Block DiagramTbktc Operating RegistersR2/PC − Program Counter & Stack Address 02h R1/TCC − Time Clock /Counter Address 01hBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select R3/SR − Status Register Address 03hBit 5 Not used RBS1 RBS0General Purpose Register Bank Address 20H ~ 3FH Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04hGRBS1 GRBS0 PORT6 − Port 6 I/O Data Register Address 06h SIS = 0 Idle mode SIS = 1 Sleep modePORT7 Port 7 I/O Data Register Address 07h PORT8 − Port 8 I/O Data Register Address 08hTC4S = 1 Start TC4CR Timer/Counter 4 Control Register Address 0BhTC4FF1 TC4FF0 TC4CK2 TC4CK1 TC4CK0ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0ChTC3CAP = Bit 7 TC3CAP Software capture controlTC3S = 1 Start TC3CAP TC3S TC3CK1 TC3CK0 TC3MTC2M = 1 Window mode TC3DB − Timer 3 Data Buffer B Address 07hBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC2S = 1 StartAdcr − AD Control Register Address 0Bh TC2DH − Timer 2 Data Buffer High Byte Address 09hTC2DL − Timer 2 Data Buffer Low Byte Address 0Ah Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 3 ADP AD power controlAdic − AD Input Pin Control Address 0Ch Addh − AD High 8-bit Data Buffer Address 0DhTEN = 0 Disable TEN = 1 Enable Bit 7 TEN Keytone enable controlBit 3 Tbten Time Base Timer Enable Control Bit Microcontroller Tbktc − TBT/Keytone Control Address 0EhUinven = 0 Disable TXD and RXD port inverse output Bit 3 Uinven Enable Uart TXD and RXD port inverse outputUinven = 1 Enable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate SelectEven = 0 Odd parity Even = 1 Even parity Bit 5 PRE Enable parity additionBit Microcontroller URS − Uart Status Register Address 07h EDS = 0 Rising edge EDS = 1 Falling edge Bit 2 EDS Data shift out edge selectSMP Dcol BRS2 BRS1 EDS Dord WBESPIC2 − SPI Control Register 2 Address 06h Transfer ModeSpid SPI Data Buffer Address 07h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0PLC1 Pull Low Control Register 1 Address 0Bh PLE7x = 1 Disable P7x pull lowPHC2 − Pull High Control Register 2 Address 0Ch PLC2 − Pull Low Control 2 Address 0DhAccumulator Special Purpose RegistersControl Register Bit 7 Wdto WDT output selectIntcr − INT Control Register Address 0Bh Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control RegisterBit 2 Reserved INT1ES = 0 Rising edge INT1ES = 1 Falling edgeExternal Interrupt INT Pin Secondary Enable Condition Function PinAdoscr − AD Offset Control Register Address 0Ch EdgeUerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRegisters for CPU operation mode CPU Operation ModeRbank Register Bank bits 7, 6 of R3, R/W Read/Write RbankNormal Mode Switching ControlOperation Mode Registers for AD Converter Circuit AD Converter→ Don’t care → Interrupt request flag will be recorded Conversion Time ADC Data RegisterSampling Time Max. Frequency Max. Conversion Rate per Bit Time Base Timer and Keytone GeneratorADCK10 Tone Output Pin Timing Chart Rbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Universal Asynchronous Receiver/TransmitterRegisters for Uart Circuit Data Format in Uart Uart ModeReceiving TransmittingRegisters for the SPI Circuit SPI Serial Peripheral InterfaceBaud Rate Generator Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial ClockBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeMultiple Device Connect /SS SCK pinRbank Address Name Bit 7 Bit 6 Bit Timer/CounterRegisters for Timer/Counter 2 Circuit Window Mode Timer ModeCounter Mode Registers for Timer/Counter 3 Circuit Window Mode Timing ChartConfiguration of Timer/Counter3 Capture modeTCIF4 Registers for Timer 4 CircuitTCR4 PDO ModeTC4 Interrupt PWM Mode12 TCC/WDT & Prescaler 13 I/O Ports Reset and Wake-upReset All interrupt Wake-up from Sleep ModeWake-up from Idle mode Summary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankTC2D9 TC2D8 Register Bank Reset Type Previous value before resetStatus of RST, T, and P of Status Register Bit Microcontroller General Purpose RegistersInterrupt Controller Reset Block DiagramOscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating SpeedsEM78P809N Oscillator Type Frequency Mode C1 pF C2 pFExt. Clock 740Crystal/Resonator-Parallel Mode Circuit External RC Oscillator ModeCode Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word For design reference onlyExternal Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register Cyes = 0 One cycle Cyes = 1 Two cyclesVdd Residue-Voltage ProtectionEM78P809N Rin Vdd EM78P809NVdd 40KR2 Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedAbsolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss =Typical value is based on characterization results at 25C DC Electrical CharacteristicsTa= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V = selected prescaler ratioAC Test Input/Output Waveform Timing DiagramPin Count Package Size Package TypesOTP MCU Contents III EM78P809N