IBM EM78P809N manual Oscillator Modes, Crystal Oscillator/Ceramic Resonators Crystal

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EM78P809N

8-Bit Microcontroller

When one of the interrupts (enabled) occurs, the next instruction will be fetched from individual address. The interrupt flag bit must be cleared by instructions before leaving the interrupt service routine and before interrupts are enabled to avoid recursive interrupts.

The flag (except ICIF bit) in the Interrupt Status Register (ISFR 2) is set regardless of the status of its mask bit or the execution of ENI. The RETI instruction ends the interrupt routine and enables the global interrupt (the execution of ENI).

4.16Oscillator

4.16.1Oscillator Modes

The EM78P809N can operate in two different oscillator modes, i.e., Crystal oscillator mode and External RC oscillator mode (ERC) oscillator mode. User can select which mode by Code Option Register. The maximum limit for operational frequencies of the crystal/resonator under different VDDs is listed below.

Table 10 Oscillator Modes Defined by SDCS and OSC

Mode

OSC

Oscillator

Single Clock

1	High frequency oscillator

0	ERC

Table 11 The Summary of Maximum Operating Speeds

Condition

VDD

Max. Fxt. (MHz)

High frequency oscillator

3.0	4.0

5.0	10.0

4.16.2Crystal Oscillator/Ceramic Resonators (Crystal)

EM78P809N has a clock generator. i.e. Fc (high frequency) which can be driven by an external clock signal through the OSCI pin.

In most applications, Pin OSCI and Pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Table 12 provides the recommended values of C1 and C2. Since each resonator has its own attribute, user should refer to its specification for appropriate values of C1 and C2. A serial resistor Rs may be necessary for AT strip cut crystal.

Product Specification (V1.0) 07.26.2005

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(This specification is subject to change without further notice)

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Contents DOC. Version EM78P809NElan Microelectronics Corporation Contents Specification Revision History Bit Microcontroller CPU„ General purpose ApplicationsPin Assignment OTP Programming Pins Function Description Functional Block DiagramTbktc Operating RegistersR2/PC − Program Counter & Stack Address 02h R1/TCC − Time Clock /Counter Address 01hRBS1 RBS0 R3/SR − Status Register Address 03hBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select Bit 5 Not usedGeneral Purpose Register Bank Address 20H ~ 3FH Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04hGRBS1 GRBS0 PORT8 − Port 8 I/O Data Register Address 08h SIS = 0 Idle mode SIS = 1 Sleep modePORT6 − Port 6 I/O Data Register Address 06h PORT7 Port 7 I/O Data Register Address 07hTC4CK2 TC4CK1 TC4CK0 TC4CR Timer/Counter 4 Control Register Address 0BhTC4S = 1 Start TC4FF1 TC4FF0ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0ChTC3CAP TC3S TC3CK1 TC3CK0 TC3M Bit 7 TC3CAP Software capture controlTC3CAP = TC3S = 1 StartTC2S = 1 Start TC3DB − Timer 3 Data Buffer B Address 07hTC2M = 1 Window mode Bit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data bufferAdcr − AD Control Register Address 0Bh TC2DH − Timer 2 Data Buffer High Byte Address 09hTC2DL − Timer 2 Data Buffer Low Byte Address 0Ah Addh − AD High 8-bit Data Buffer Address 0Dh Bit 3 ADP AD power controlBit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Adic − AD Input Pin Control Address 0ChBit Microcontroller Tbktc − TBT/Keytone Control Address 0Eh Bit 7 TEN Keytone enable controlTEN = 0 Disable TEN = 1 Enable Bit 3 Tbten Time Base Timer Enable ControlBit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate Select Bit 3 Uinven Enable Uart TXD and RXD port inverse outputUinven = 0 Disable TXD and RXD port inverse output Uinven = 1 Enable TXD and RXD port inverse outputEven = 0 Odd parity Even = 1 Even parity Bit 5 PRE Enable parity additionBit Microcontroller URS − Uart Status Register Address 07h EDS Dord WBE Bit 2 EDS Data shift out edge selectEDS = 0 Rising edge EDS = 1 Falling edge SMP Dcol BRS2 BRS1SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 Transfer ModeSPIC2 − SPI Control Register 2 Address 06h Spid SPI Data Buffer Address 07hPLC2 − Pull Low Control 2 Address 0Dh PLE7x = 1 Disable P7x pull lowPLC1 Pull Low Control Register 1 Address 0Bh PHC2 − Pull High Control Register 2 Address 0ChBit 7 Wdto WDT output select Special Purpose RegistersAccumulator Control RegisterINT1ES = 0 Rising edge INT1ES = 1 Falling edge Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control RegisterIntcr − INT Control Register Address 0Bh Bit 2 ReservedEdge INT Pin Secondary Enable Condition Function PinExternal Interrupt Adoscr − AD Offset Control Register Address 0ChUerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRbank CPU Operation ModeRegisters for CPU operation mode Rbank Register Bank bits 7, 6 of R3, R/W Read/WriteNormal Mode Switching ControlOperation Mode Registers for AD Converter Circuit AD Converter→ Don’t care → Interrupt request flag will be recorded Conversion Time ADC Data RegisterSampling Time Max. Frequency Max. Conversion Rate per Bit Time Base Timer and Keytone GeneratorADCK10 Tone Output Pin Timing Chart Rbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Universal Asynchronous Receiver/TransmitterRegisters for Uart Circuit Data Format in Uart Uart ModeReceiving TransmittingRegisters for the SPI Circuit SPI Serial Peripheral InterfaceBaud Rate Generator Serial Clock Shift Direction and Sample PhaseTransfer Mode Bit Transmit ModeBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeMultiple Device Connect /SS SCK pinRbank Address Name Bit 7 Bit 6 Bit Timer/CounterRegisters for Timer/Counter 2 Circuit Window Mode Timer ModeCounter Mode Registers for Timer/Counter 3 Circuit Window Mode Timing ChartConfiguration of Timer/Counter3 Capture modeTCIF4 Registers for Timer 4 CircuitTCR4 PDO ModeTC4 Interrupt PWM Mode12 TCC/WDT & Prescaler 13 I/O Ports Reset and Wake-upReset All interrupt Wake-up from Sleep ModeWake-up from Idle mode Summary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankTC2D9 TC2D8 Register Bank Bit Microcontroller General Purpose Registers Previous value before resetReset Type Status of RST, T, and P of Status RegisterInterrupt Controller Reset Block DiagramSummary of Maximum Operating Speeds OscillatorOscillator Modes Crystal Oscillator/Ceramic Resonators Crystal740 Oscillator Type Frequency Mode C1 pF C2 pFEM78P809N Ext. ClockCrystal/Resonator-Parallel Mode Circuit External RC Oscillator ModeFor design reference only Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Code Option Register WordCyes = 0 One cycle Cyes = 1 Two cycles Power-on ConsiderationsExternal Power-on Reset Circuit Customer ID RegisterVdd EM78P809N Residue-Voltage ProtectionVdd EM78P809N RinVdd 40KR2 Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedVss = Symbol Parameter Condition Min Typ Max UnitAbsolute Maximum Ratings Recommended Operating ConditionsTypical value is based on characterization results at 25C DC Electrical CharacteristicsTa= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef = selected prescaler ratio AC Electrical CharacteristicSymbol Parameter Conditions Min Typ Max Unit Ta=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0VAC Test Input/Output Waveform Timing DiagramPin Count Package Size Package TypesOTP MCU Contents III EM78P809N