IBM EM78P809N manual Instruction Set, Vdd 40KR2

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Vdd

EM78P809N

/RESET

EM78P809N

8-Bit Microcontroller

Vdd

R1

Q1

40KR2

Fig 37. Residue Voltage Protection Circuit 2

4.19 Instruction Set

Each instruction in the instruction set is a 13-bit word divided into an OP code and one or more operands. Normally, all instructions are executed within one single instruction cycle (one instruction consists of 2 oscillator periods), unless the program counter is changed by instruction "MOV R2,A", "ADD R2,A", or by instructions of arithmetic or logic operation on R2 (e.g. "SUB R2,A", "BS(C) R2,6", "CLR R2", ⋅⋅⋅⋅). In this case, the execution takes two instruction cycles.

In case the instruction cycle specification is not suitable for certain applications, try to modify the instruction as follows:

(A)Change one instruction cycle to consist of 4 oscillator periods.

(B)The following commands are executed within two instruction cycles; "JMP", "CALL", "RET", "RETL", "RETI", including the conditional skip ("JBS", "JBC", "JZ", "JZA", "DJZ", "DJZA") instructions. In addition, instructions that are written to the program counter are executed within two instruction cycles.

Case (A) is selected by the CODE Option bit, called CLK. One instruction cycle consists of two oscillator clocks if CLK is low, and four oscillator clocks if CLK is high.

Note that once the 4 oscillator periods within one instruction cycle is selected as in Case (A), the internal clock source to TCC should be CLK=Fosc/4, not Fosc/2.

Furthermore, the instruction set has the following features:

(1)Every bit of any register can be set, cleared, or tested directly.

(2)The I/O register can be regarded as general register. That is, the same instruction can operate on I/O register.

The symbol "R" represents a register designator that specifies which one of the registers (including operational registers and general purpose registers) is to be utilized by the instruction. "b" represents a bit field designator that selects the value for the bit which is located in the register "R", and affects the operation. "k" represents an 8 or 10-bit constant or literal value.

Product Specification (V1.0) 07.26.2005

• 61

(This specification is subject to change without further notice)

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Contents DOC. Version EM78P809NElan Microelectronics Corporation Contents Specification Revision History Bit Microcontroller CPU„ General purpose ApplicationsPin Assignment OTP Programming Pins Function Description Functional Block DiagramTbktc Operating RegistersR2/PC − Program Counter & Stack Address 02h R1/TCC − Time Clock /Counter Address 01hBit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select R3/SR − Status Register Address 03hBit 5 Not used RBS1 RBS0General Purpose Register Bank Address 20H ~ 3FH Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04hGRBS1 GRBS0 PORT6 − Port 6 I/O Data Register Address 06h SIS = 0 Idle mode SIS = 1 Sleep modePORT7 Port 7 I/O Data Register Address 07h PORT8 − Port 8 I/O Data Register Address 08hTC4S = 1 Start TC4CR Timer/Counter 4 Control Register Address 0BhTC4FF1 TC4FF0 TC4CK2 TC4CK1 TC4CK0ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0ChTC3CAP = Bit 7 TC3CAP Software capture controlTC3S = 1 Start TC3CAP TC3S TC3CK1 TC3CK0 TC3MTC2M = 1 Window mode TC3DB − Timer 3 Data Buffer B Address 07hBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC2S = 1 StartAdcr − AD Control Register Address 0Bh TC2DH − Timer 2 Data Buffer High Byte Address 09hTC2DL − Timer 2 Data Buffer Low Byte Address 0Ah Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control Bit 3 ADP AD power controlAdic − AD Input Pin Control Address 0Ch Addh − AD High 8-bit Data Buffer Address 0DhTEN = 0 Disable TEN = 1 Enable Bit 7 TEN Keytone enable controlBit 3 Tbten Time Base Timer Enable Control Bit Microcontroller Tbktc − TBT/Keytone Control Address 0EhUinven = 0 Disable TXD and RXD port inverse output Bit 3 Uinven Enable Uart TXD and RXD port inverse outputUinven = 1 Enable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate SelectEven = 0 Odd parity Even = 1 Even parity Bit 5 PRE Enable parity additionBit Microcontroller URS − Uart Status Register Address 07h EDS = 0 Rising edge EDS = 1 Falling edge Bit 2 EDS Data shift out edge selectSMP Dcol BRS2 BRS1 EDS Dord WBESPIC2 − SPI Control Register 2 Address 06h Transfer ModeSpid SPI Data Buffer Address 07h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0PLC1 Pull Low Control Register 1 Address 0Bh PLE7x = 1 Disable P7x pull lowPHC2 − Pull High Control Register 2 Address 0Ch PLC2 − Pull Low Control 2 Address 0DhAccumulator Special Purpose RegistersControl Register Bit 7 Wdto WDT output selectIntcr − INT Control Register Address 0Bh Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control RegisterBit 2 Reserved INT1ES = 0 Rising edge INT1ES = 1 Falling edgeExternal Interrupt INT Pin Secondary Enable Condition Function PinAdoscr − AD Offset Control Register Address 0Ch EdgeUerrie Urie Utie Tbie EXIE1 TCIE0 IMR2 − Interrupt Mask Register 2 Address 0FhRegisters for CPU operation mode CPU Operation ModeRbank Register Bank bits 7, 6 of R3, R/W Read/Write RbankNormal Mode Switching ControlOperation Mode Registers for AD Converter Circuit AD Converter→ Don’t care → Interrupt request flag will be recorded Conversion Time ADC Data RegisterSampling Time Max. Frequency Max. Conversion Rate per Bit Time Base Timer and Keytone GeneratorADCK10 Tone Output Pin Timing Chart Rbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Universal Asynchronous Receiver/TransmitterRegisters for Uart Circuit Data Format in Uart Uart ModeReceiving TransmittingRegisters for the SPI Circuit SPI Serial Peripheral InterfaceBaud Rate Generator Transfer Mode Shift Direction and Sample PhaseBit Transmit Mode Serial ClockBit Transmit/Receive Mode Bit Microcontroller Bit Receive ModeMultiple Device Connect /SS SCK pinRbank Address Name Bit 7 Bit 6 Bit Timer/CounterRegisters for Timer/Counter 2 Circuit Window Mode Timer ModeCounter Mode Registers for Timer/Counter 3 Circuit Window Mode Timing ChartConfiguration of Timer/Counter3 Capture modeTCIF4 Registers for Timer 4 CircuitTCR4 PDO ModeTC4 Interrupt PWM Mode12 TCC/WDT & Prescaler 13 I/O Ports Reset and Wake-upReset All interrupt Wake-up from Sleep ModeWake-up from Idle mode Summary of the Initialized Values for Registers Address Name Reset Type BitSCR Bit Microcontroller Register BankTC2D9 TC2D8 Register Bank Reset Type Previous value before resetStatus of RST, T, and P of Status Register Bit Microcontroller General Purpose RegistersInterrupt Controller Reset Block DiagramOscillator Modes OscillatorCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating SpeedsEM78P809N Oscillator Type Frequency Mode C1 pF C2 pFExt. Clock 740Crystal/Resonator-Parallel Mode Circuit External RC Oscillator ModeCode Option Register Enwdtb = 0 Enable Enwdtb = 1 DisableCode Option Register Word For design reference onlyExternal Power-on Reset Circuit Power-on ConsiderationsCustomer ID Register Cyes = 0 One cycle Cyes = 1 Two cyclesVdd Residue-Voltage ProtectionEM78P809N Rin Vdd EM78P809NVdd 40KR2 Instruction SetDEC Binary Instruction Hex Mnemonic Operation Status AffectedAbsolute Maximum Ratings Symbol Parameter Condition Min Typ Max UnitRecommended Operating Conditions Vss =Typical value is based on characterization results at 25C DC Electrical CharacteristicsTa= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V = selected prescaler ratioAC Test Input/Output Waveform Timing DiagramPin Count Package Size Package TypesOTP MCU Contents III EM78P809N