Quatech RS-422/485, MPA-200/300 user manual RR0, RR1, RR2, RR3, RR6, RR7, RR8

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Example 3: Write data into the transmit buffer of channel A.

mov

dx,base

; load base address

out

dx,al

; write data in ax to buffer

Example 4: Read data from the receive buffer of channel A.

 

 

mov

dx,base

; load base address

 

 

in

al,dx

; write data in ax to buffer

Table 2

SCC read register description.

 

 

 

 

RR0

 

Transmit, Receive buffer statuses and external status

 

 

 

RR1

 

Special Receive Condition status, residue codes, error conditions

RR2

 

Modified Channel B interrupt vector and Unmodified Channel A

 

 

 

interrupt vector

 

RR3

 

Interrupt Pending bits

 

RR6

 

LSB of frame byte count register

RR7

 

MSB of frame byte count and FIFO status register

 

 

 

 

 

RR8

 

Receive buffer

 

 

RR10

 

Miscellaneous status parameters

RR12

 

Lower byte of baud rate time constant

RR13

 

Upper byte of baud rate time constant

RR15

 

External/Status interrupt information

 

 

 

 

 

The SCC can perform three basic forms of I/O operations: polling, interrupts, and block transfer. Polling transfers data, without interrupts, by reading the status of RR0 and then reading or writing data to the SCC buffers via CPU port accesses. Interrupts on the SCC can be sourced from the receiver, the transmitter, or External/Status conditions. At the event of an interrupt, Status can be determined, then data can be written to or read from the SCC via CPU port accesses. For block transfer mode, DMA transfers accomplish data transfers from the SCC to memory or from memory to the SCC, interrupting the CPU only when the Block is finished. Further information on these subjects are found in the chapters titled INTERRUPTS, and DIRECT MEMORY ACCESS.

The SCC incorporates additional circuitry supporting serial communications. This circuitry includes clocking options, baud rate generator (BRG), data encoding, and internal loopback. The SCC may be programmed to select one of several sources to provide the transmit and receive clocks. These clocks can be programmed in WR11 to come from the RTXC pin, the TRXC pin, the output of the BRG, or the transmit output of the DPLL. The MPA-200 uses the TRXC pin for its transmit

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Quatech Inc., MPA-200/300 Manual

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Contents QUATECH, INC MPA-200/300Page Warranty Information Page Compliances Electromagnetic Emissions Table of Contents Quatech Inc., MPA-200/300 Manual Introduction MPA-200 board drawing IRQ DMA/DRQ Hardware InstallationSCC General Information Accessing the registers RR1 RR0RR2 RR3WR1 WR0WR2 WR3Baud Rate Generator Programming SCC Data Encoding Methods J4 Interrupt Configuration Jumper Block ConfigurationsJ5 & J6 Interrupt Level Selection IRQ3 IRQ4 IRQ5 IRQ6 IRQ7J10 Transmit DMA Channel Selection IRQ10 IRQ11 IRQ12 IRQ14 IRQ15J7 Line Driver Control Selection J11 Receive DMA Channel SelectionSynca Rlen OUT J8 Synca to Rlen controlBase Address = 3F8H AddressingPage Interrupts Direct Memory Access Page Reqa Configuration Register D0 -TXSRC, Transmit DMA Source D1 -RXSRC, Receive DMA SourceTM ST Llen Rlen Rcken Tcken Rxden Txden Communications RegisterD0 -TRANSMITTER Enable D1 -RECEIVER EnableDTE / DCE Configuration Rrclk Rtclk Trxca Tclk Ttclk DTE ConfigurationDCE Configuration DCE Clock Configuration External Connections CTS Ctsa +DSR Dcda DTR DTR/REQA DSR Dcda +RRCLK Trxc Test ModeTest Mode Null-Modem Cables Circuit CC Data SET Ready DSR Connector Notation +DSR,-DSR Circuit AB Signal Ground Connector Notation DgndConnector Notation +TXD,-TXD Connector Notation +RXD,-RXDConnector Notation +RRCLK,-RRCLK Connector Notation +RTCLK,-RTCLKCircuit CA Request to Send RTS Connector Notation +RTS,-RTS Circuit CB Clear to Send CTS Connector Notation +CTS,-CTSCircuit LL Local Loopback LL Connector Notation Llbk Circuit CD DTE Ready DTR Connector Notation +DTR,-DTRCircuit RL Remote Loopback RL Connector Notation Rlbk Circuit TM Test Mode TM Connector Notation Test Mode Specifications MPA-200/300 Version March