Advantech PCI-1710 user manual Analog Output Connections, 10V

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3.4 Analog Output Connections

The PCI-1710/1710HG card provides two D/A output channels, DA0_OUT and DA1_OUT. Users may use the PCI-1710/1710HG internally provided precision –5V (-10V) reference to generate 0 to +5 V (+10 V) D/A output range. Users also may create D/A output range through external references, DA0_REF and DA1_REF. The maximum reference input range is +/-10 V. Connecting with an external reference of -7 V will generate 0 to +7 V DA output.

Figure 3-5 shows how to make analog output and external reference input connections on the PCI-1710/1710HG card.

InternalExternal

-5V	INT_REF		DA0_REF
-10V			DA0_REF


			DA0_OUT	+	External Reference
		DA 0	DA0_OUT		for DA signal 0
		DA 0			for DA signal 0
				Load _
	DATA BUS		AOGND
	DATA BUS
				Load
			DA1_OUT	+	External Reference
		DA 1	DA1_OUT		for DA signal 1
		DA 1

_

DA1_REF

INT_REF

I/O Connector

Figure 3-5: Analog output connections

Chapter 3 Signal Connections

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Contents PCI-1710/1710HG Multifunction DAS Card for PCI Bus Http/support.advantech.com Contents Appendix a 82C54 Counter Chip Functions General Information On-board Fifo First In First Out Memory Flexible Inputs Types and Ranges SettingIntroduction PCI-bus Plug and PlayOn-board Programmable Counter FeaturesAnalog Input SpecificationsLinearity error ±1 LSB Input impedance 1 GΩ Analog Output Digital InputDigital Output General Programmable Timer/CounterPCI Block DiagramInstallation Unpacking Initial InspectionInstallation Instructions Page Signal Connections I/O Connector OverviewPin Assignment I/O connector pin assignments for the PCI-1710/1710 HG card Input Connector Signal DescriptionsDigital Output signals Connector Signal Descriptions partSignal Reference Direction Description Name Single-ended Channel Connections Analog Input Connections Single-ended input channel connection Differential Channel ConnectionsAignd Differential input channel connection floating signal source 10V Analog Output ConnectionsTrigger Source Connections Internal Pacer Trigger ConnectionExternal Trigger Source Connection Field Wiring Considerations Page Register Structure and Format I/O Port Address Map Base Read DI9 DI8 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 Base Write DO9 DO8 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Software A/D Trigger BASE+0 Channel Number and A/D Data BASE+0 and BASE+1A/D Channel Range Setting BASE+2 PCI-1710 PCI-1710HG MUX Control-BASE+4 and BASE+5 Example Control Register BASE+6 Status Register BASE+6 and BASE+7 Clear Interrupt and Fifo BASE+8 and BASE+9 11 D/A Output Channel 1 BASE+12 and BASE+13 10 D/A Output Channel 0 BASE+10 and BASE+1112 D/A Reference Control BASE+14 Read Digital Input Digital I/O Registers BASE+16 and BASE+17Calibration PCL-1710/1710HG VR assignment VR AssignmentFollowing list shows the function of each VR A/D CalibrationD/A Calibration Self A/D Calibration Page 82C54 Counter Chip Functions Intel 82C54 CounterCounter 1 Description Counter Read/Write Control RegistersRW1 & RW0 STA = Counter Operating Modes Mode 0 Stop on Terminal CountMode 1 Programmable One-shot Pulse Mode 2 Rate GeneratorMode 3 Square Wave Generator Mode 4 -Software-Triggered StrobeMode 5 Hardware-Triggered Strobe Counter Read-back Command Counter OperationsRead/Write Operation Counter Latch Operation