Advantech PCI-1710 user manual DO9 DO8 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0

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Table 4-1: PCI-1710/1710HG register format (Part 4)

Base				Write
Address
Address	7	6	5	4	3		2	1	0
+ decimal	7	6	5	4	3		2	1	0

			D/A Reference Control

15

14					DA1_I/E	DA1_5/10		DA0_I/E	DA0_5/10

				Digital Output

17	DO15	DO14	DO13	DO12	DO11		DO10	DO9	DO8

16	DO7	DO6	DO5	DO4	DO3		DO2	DO1	DO0

				Counter 0

25

24	D7	D6	D5	D4	D3		D2	D1	D0

				Counter 1

27

26	D7	D6	D5	D4	D3		D2	D1	D0

				Counter 2

29

28	D7	D6	D5	D4	D3		D2	D1	D0

				Counter Control

31

30	D7	D6	D5	D4	D3		D2	D1	D0

32 PCI-1710/1710HG User's Manual

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Contents PCI-1710/1710HG Multifunction DAS Card for PCI Bus Http/support.advantech.com Contents Appendix a 82C54 Counter Chip Functions General Information Flexible Inputs Types and Ranges Setting IntroductionPCI-bus Plug and Play On-board Fifo First In First Out MemoryFeatures On-board Programmable CounterSpecifications Analog InputLinearity error ±1 LSB Input impedance 1 GΩ Analog Output Digital InputDigital Output Programmable Timer/Counter GeneralBlock Diagram PCIInstallation Initial Inspection UnpackingInstallation Instructions Page Signal Connections I/O Connector OverviewPin Assignment I/O connector pin assignments for the PCI-1710/1710 HG card Connector Signal Descriptions InputConnector Signal Descriptions part Digital Output signalsSignal Reference Direction Description Name Analog Input Connections Single-ended Channel ConnectionsDifferential Channel Connections Single-ended input channel connectionAignd Differential input channel connection floating signal source Analog Output Connections 10VTrigger Source Connections Internal Pacer Trigger ConnectionExternal Trigger Source Connection Field Wiring Considerations Page Register Structure and Format I/O Port Address Map Base Read DI9 DI8 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 Base Write DO9 DO8 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Channel Number and A/D Data BASE+0 and BASE+1 Software A/D Trigger BASE+0A/D Channel Range Setting BASE+2 PCI-1710 PCI-1710HG MUX Control-BASE+4 and BASE+5 Example Control Register BASE+6 Status Register BASE+6 and BASE+7 Clear Interrupt and Fifo BASE+8 and BASE+9 10 D/A Output Channel 0 BASE+10 and BASE+11 11 D/A Output Channel 1 BASE+12 and BASE+1312 D/A Reference Control BASE+14 Digital I/O Registers BASE+16 and BASE+17 Read Digital InputCalibration VR Assignment PCL-1710/1710HG VR assignmentA/D Calibration Following list shows the function of each VRD/A Calibration Self A/D Calibration Page 82C54 Counter Chip Functions Intel 82C54 CounterCounter 1 Counter Read/Write Control Registers DescriptionRW1 & RW0 STA = Mode 0 Stop on Terminal Count Mode 1 Programmable One-shot PulseMode 2 Rate Generator Counter Operating ModesMode 3 Square Wave Generator Mode 4 -Software-Triggered StrobeMode 5 Hardware-Triggered Strobe Counter Read-back Command Counter OperationsRead/Write Operation Counter Latch Operation