C2SEA/C2SEE User's Manual
Checkpoint
86h
87h
88h
89h
8Ch
8Dh
8Fh
91h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
A2h
A3h
A4h
A5h
A7h
A8h
Code Description
The password was checked. Performing any required programming before WIN- BIOS Setup next.
The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
The programming after WINBIOS Setup has completed. Displaying the power on screen message next.
Programming the WINBIOS Setup options next.
The WINBIOS Setup options are programmed. Resetting the hard disk controller next.
The hard disk controller has been reset. Configuring the floppy drive controller next.
The floppy drive controller has been configured. Configuring the hard disk drive controller next.
Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional information.
Initializing before passing control to the adaptor ROM at C800.
Initialization before the C800 adaptor ROM gains control has completed. The adap- tor ROM check is next.
The adaptor ROM had control and has now returned control to BIOS POST. Perform- ing any required processing after the option ROM returned control.
Any initialization required after the option ROM test has completed. Configuring the timer data area and printer base address next.
Set the timer and printer base addresses. Setting the
Returned after setting the
Required initialization before the Coprocessor test is over. Initializing the Coproces- sor next.
Coprocessor initialized. Performing any required initialization after the Coproces- sor test next.
Initialization after the Coprocessor test is complete. Checking the extended keyboard, keyboard ID, and Num Lock key next. Issuing the keyboard ID command next.
Displaying any soft errors next.
The soft error display has completed. Setting the keyboard typematic rate next.
The keyboard typematic rate is set. Programming the memory wait states next.
Memory wait state programming is over. Clearing the screen and enabling parity and the NMI next.
NMI and parity enabled. Performing any initialization required before passing control to the adaptor ROM at E000 next.
Initialization before passing control to the adaptor ROM at E000h completed. Passing control to the adaptor ROM at E000h next.