Cypress CY7C1330AV25, CY7C1332AV25 manual Boundary Scan Order 512K x

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CY7C1330AV25

 

 

 

 

 

 

 

PRELIMINARY

 

 

CY7C1332AV25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Boundary Scan Order (512K x 36)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit #

Bump ID

 

 

Bit #

Bump ID

 

Bit #

 

Bump ID

 

 

 

 

 

 

 

 

 

 

 

 

1

5R

 

 

25

6F

 

49

 

2H

 

 

 

 

 

 

 

 

 

 

 

 

2

4P

 

 

26

7E

 

50

 

1H

 

 

 

 

 

 

 

 

 

 

 

 

3

4T

 

 

27

6E

 

51

 

3G

 

 

 

 

 

 

 

 

 

 

 

 

4

6R

 

 

28

7D

 

52

 

4D

 

 

 

 

 

 

 

 

 

 

 

 

5

5T

 

 

29

6D

 

53

 

4E

 

 

 

 

 

 

 

 

 

 

 

 

6

7T

 

 

30

6A

 

54

 

4G

 

 

 

 

 

 

 

 

 

 

 

 

7

6P

 

 

31

6C

 

55

 

4H

 

 

 

 

 

 

 

 

 

 

 

 

8

7P

 

 

32

5C

 

56

 

4M

 

 

 

 

 

 

 

 

 

 

 

 

9

6N

 

 

33

5A

 

57

 

3L

 

 

 

 

 

 

 

 

 

 

 

 

10

7N

 

 

34

6B

 

58

 

1K

 

 

 

 

 

 

 

 

 

 

 

 

11

6M

 

 

35

5B

 

59

 

2K

 

 

 

 

 

 

 

 

 

 

 

 

12

6L

 

 

36

3B

 

60

 

1L

 

 

 

 

 

 

 

 

 

 

 

 

13

7L

 

 

37

2B

 

61

 

2L

 

 

 

 

 

 

 

 

 

 

 

 

14

6K

 

 

38

3A

 

62

 

2M

 

 

 

 

 

 

 

 

 

 

 

 

15

7K

 

 

39

3C

 

63

 

1N

 

 

 

 

 

 

 

 

 

 

 

 

16

5L

 

 

40

2C

 

64

 

2N

 

 

 

 

 

 

 

 

 

 

 

 

17

4L

 

 

41

2A

 

65

 

1P

 

 

 

 

 

 

 

 

 

 

 

 

18

4K

 

 

42

2D

 

66

 

2P

 

 

 

 

 

 

 

 

 

 

 

 

19

4F

 

 

43

1D

 

67

 

3T

 

 

 

 

 

 

 

 

 

 

 

 

20

5G

 

 

44

2E

 

68

 

2R

 

 

 

 

 

 

 

 

 

 

 

 

21

7H

 

 

45

1E

 

69

 

4N

 

 

 

 

 

 

 

 

 

 

 

 

22

6H

 

 

46

2F

 

70

 

3R

 

 

 

 

 

 

 

 

 

 

 

 

23

7G

 

 

47

2G

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

6G

 

 

48

1G

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document No: 001-07844 Rev. *A

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Contents Features ConfigurationLogic Block Diagram Functional DescriptionPin Configurations Ball BGA 14 x 22 x 2.4 mm Maximum Access Time Maximum Operating CurrentSelection Guide UnitPin Definitions Name Type DescriptionByte Write Select Inputs, active LOW. Qualified with Serial clock to the Jtag circuit No connectsSleep Mode IntroductionFunctional Overview ZZ Mode Electrical Characteristics Cycle Description Truth , 2, 3, 4Write Cycle Descriptions 1 Write Cycle Descriptions1Ieee 1149.1 Serial Boundary Scan Jtag Extest TAP Controller State Diagram6 EXIT2-IR UPDATE-DR UPDATE-IRTAP Controller Block Diagram TAP Electrical Characteristics Over the Operating Range7, 8Parameter Description Min Max Unit Set-up TimesTAP Timing and Test Conditions11 Identification Register DefinitionsParameter Description Min Output TimesScan Register Sizes Instruction CodesBoundary Scan Order 1 Mbit x Boundary Scan Order 512K x Electrical Characteristics Over the Operating Range Maximum RatingsOperating Range Ambient RangeCapacitance17 Thermal Resistance17AC Test Loads and Waveforms Parameter Description Test Conditions Max UnitSwitching Characteristics 18, 19, 20 250 200 Parameter Description Unit Min MaxClock Switching Waveforms READ/WRITE/DESELECT Sequence OE Controlled23, 24, 25= DON’T Care = Undefined READ/WRITE/DESELECT Sequence CE Controlled Originally DeselectedPackage Diagram Ordering InformationBall Pbga 14 x 22 x 2.4 mm ECN No Issue Date Orig. Description of Change New data sheetMinor change Moved data sheet to web Document History