Cypress CY7C1303BV25, CY7C1306BV25 manual Switching Waveforms25, 26, Write Read NOP

Page 17

CY7C1303BV25

CY7C1306BV25

Switching Waveforms[25, 26, 27]

READ

1

K

tKH

K

RPS

WPS

A A0

WRITE

 

READ

 

 

WRITE

 

READ

 

 

WRITE

 

NOP

 

WRITE

 

NOP

 

2

 

 

 

3

4

 

5

 

 

 

6

7

8

9

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tKL

 

 

 

tCYC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tKHKH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSC tHC

A1

A2

A3

A4

A5

A6

 

tSA tHA

tSA tHA

 

D D10

D11

D30

D31

 

 

 

tSD

D50

D51

D60

tHD

 

tSD

D61

tHD

Q

tKHCH tKHCH

C

tKH

 

tKL

C

 

Q00

Q01

Q20

Q21

Q40

tCLZ

 

tDOH

tDOH

 

 

tCO

tCO

 

 

 

 

tKHKH

 

tCYC

 

 

 

DON’T CARE

Q41

tCHZ

UNDEFINED

Notes:

24.tCHZ, tCLZ, are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ± 100 mV from steady-state voltage.

25.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, i.e., A0+1.

26.Outputs are disabled (High-Z) one clock cycle after a NOP.

27.In this example, if address A2 = A1 then data Q2 0= D10 and Q21 = D11. Write data is forwarded immediately as read results.This note applies to the whole diagram.

Document #: 38-05627 Rev. *A

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Contents Configurations FeaturesFunctional Description CY7C1303BV25 1M x CY7C1306BV25 512K xLogic Block Diagram CY7C1306BV25 Logic Block Diagram CY7C1303BV25Selection Guide CY7C1303BV25-167 UnitCY7C1306BV25 512K x Pin Configuration Ball Fbga 13 x 15 x 1.4 mm PinoutPin Definitions Introduction Concurrent Transactions Application Example1Depth Expansion Programmable ImpedanceComments Write Descriptions CY7C1303BV25 2Write Descriptions CY7C1306BV25 2 Ieee 1149.1 Serial Boundary Scan Jtag Sample Z EXIT2-IR UPDATE-DR UPDATE-IR TAP Controller State Diagram9TAP AC Switching Characteristics Over the Operating Range11 TAP Controller Block DiagramParameter Description Min Max Unit Output Times TAP Timing and Test Conditions12Identification Register Definitions Instruction Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionBit # Bump ID Boundary Scan OrderThermal Resistance Maximum RatingsOperating Range Capacitance Switching Characteristics Over the Operating RangeAC Test Loads and Waveforms Parameter Description Test ConditionsWrite Read NOP Switching Waveforms25, 26Ordering Information Package DiagramCY7C1306BV25-167BZC CY7C1303BV25-167BZXC CY7C1306BV25-167BZI CY7C1303BV25-167BZXIDocument History Issue Date Orig. Description of ChangeSYT NXR