Cypress CY7C1303BV25 manual Ordering Information, Package Diagram, CY7C1306BV25-167BZXI

Page 18

CY7C1303BV25

CY7C1306BV25

Ordering Information

“Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or

visit www.cypress.com for actual products offered”.

Speed

Ordering Code

Package

Package Type

Operating

(MHz)

Diagram

Range

 

 

 

 

 

167

CY7C1303BV25-167BZC

51-85180

165-ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)

Commercial

 

 

 

 

 

 

CY7C1306BV25-167BZC

 

 

 

 

 

 

 

 

 

CY7C1303BV25-167BZXC

 

165-ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Lead free

 

 

 

 

 

 

 

CY7C1306BV25-167BZXC

 

 

 

 

 

 

 

 

 

CY7C1303BV25-167BZI

 

165-ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)

Industrial

 

 

 

 

 

 

CY7C1306BV25-167BZI

 

 

 

 

 

 

 

 

 

CY7C1303BV25-167BZXI

 

165-ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Lead free

 

 

 

 

 

 

 

CY7C1306BV25-167BZXI

 

 

 

 

 

 

 

 

Package Diagram

 

 

 

 

 

165 FBGA 13 x 15 x 1.40 MM BB165D/BW165D

 

 

 

165-ball FBGA (13 x 15 x 1.4 mm) (51-85180)

 

TOP VIEW

 

 

 

 

 

 

TOP VIEW

 

 

 

PIN 1 CORNER

 

 

 

 

 

 

 

 

 

 

PIN 1 CORNER

 

 

 

 

 

 

 

1

2

3

4

5

6

7

8

9

10

11

BOTTOM VIEW

BOTTOM VIEWPIN 1 CORNER

PIN 1 CORNER

 

 

 

 

 

Ø0.05 M C

 

 

 

 

 

 

 

 

 

 

Ø0.05 M C

 

 

 

 

 

 

 

Ø0.25 M C A B

 

 

 

 

 

 

 

Ø0.50

-0Ø0.06

.25 M C A B

 

 

 

 

 

(165X)

 

 

 

 

 

 

 

 

 

+0.14

-0.06

 

11

10

9

8

7

6

5

Ø0.50

(165X)

4

3

2

1

 

 

 

 

 

 

 

 

 

+0.14

 

15.00±0.10

15.00±0.10

A

1

2

3

4

5

6

7

8

9

10

11

B

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CB

DC

ED

FE

GF

H

G

15.00±0.10

 

 

J

H

 

K

J

 

 

 

LK

ML

NM

PN

RP R

14.00 15.00±0.10

1.00

7.0014.00

1.00

7.00

11

10

9

8

7

6

5

4

3

2

1A

BA

CB

DC

ED

FE

GF

HG

JH

KJ

LK

ML

NM

PN

RP

R

A

0.25 C

A

0.3600.25.3±0C .05

A

B

13.00±0.10

 

 

B

13.00±0.10

 

 

0.53±0.05

1.40 MAX.

0.15 C 1.40 MAX.

0.15 C

C

SEATING PLANE

 

 

SEATING PLANE

 

 

 

 

 

0.36

C

 

 

0.35±0.06

0.35±0.06

 

 

1.00

A

5.00

1.00

 

5.00

 

10.00

 

10.00

B

13.00±0.10

B

13.00±0.10

0.15(4X)

 

0.15(4X)

 

NOTES :

 

SOLDERNOTESPAD TYPE: : NON-SOLDER MASK DEFINED (NSMD)

PACKAGESOLDERW IGHTPAD: 0TYPE.475g: NON-SOLDER MASK DEFINED (NSMD)

JEDEC REFERENCEPACKAGE WEIGHT: MO-216: 0./475gDESIGN 4.6C

PACKAGEJEDECODEREFERENCE: BB0AC : MO-216 / DESIGN 4.6C

PACKAGE CODE : BB0AC

51-85180-*A

51-85180-*A

Quad Data RateSRAM and QDRSRAM comprise a new family of products developed by Cypress, IDT, NEC, Renesas and Samsung. All products and company names mentioned in this document may be the trademarks of their respective holders.

Document #: 38-05627 Rev. *A

Page 18 of 19

© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

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Contents Functional Description FeaturesConfigurations CY7C1303BV25 1M x CY7C1306BV25 512K xSelection Guide Logic Block Diagram CY7C1303BV25Logic Block Diagram CY7C1306BV25 CY7C1303BV25-167 UnitPin Configuration Ball Fbga 13 x 15 x 1.4 mm Pinout CY7C1306BV25 512K xPin Definitions Introduction Depth Expansion Application Example1Concurrent Transactions Programmable ImpedanceWrite Descriptions CY7C1303BV25 2 Write Descriptions CY7C1306BV25 2Comments Ieee 1149.1 Serial Boundary Scan Jtag Sample Z TAP Controller State Diagram9 EXIT2-IR UPDATE-DR UPDATE-IRTAP Controller Block Diagram TAP AC Switching Characteristics Over the Operating Range11TAP Timing and Test Conditions12 Identification Register DefinitionsParameter Description Min Max Unit Output Times Register Name Bit Size Scan Register SizesInstruction Codes Instruction Code DescriptionBoundary Scan Order Bit # Bump IDMaximum Ratings Operating RangeThermal Resistance AC Test Loads and Waveforms Switching Characteristics Over the Operating RangeCapacitance Parameter Description Test ConditionsSwitching Waveforms25, 26 Write Read NOPCY7C1306BV25-167BZC CY7C1303BV25-167BZXC Package DiagramOrdering Information CY7C1306BV25-167BZI CY7C1303BV25-167BZXISYT Issue Date Orig. Description of ChangeDocument History NXR