Cypress CY7C1344H manual Ordering Information, Package Diagram, Pin Tqfp 14 x 20 x 1.4 mm

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CY7C1344H

Ordering Information

“Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or

visit www.cypress.com for actual products offered”.

Speed

Ordering Code

Package

Package Type

Operating

(MHz)

Diagram

Range

 

 

 

 

 

133

CY7C1344H-133AXC

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Commercial

 

 

 

 

 

 

CY7C1344H-133AXI

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Industrial

 

 

 

 

 

100

CY7C1344H-100AXC

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Commercial

 

 

 

 

 

 

CY7C1344H-100AXI

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Industrial

 

 

 

 

 

Package Diagram

100-pin TQFP (14 x 20 x 1.4 mm) (51-85050)

16.00±0.20

14.00±0.10

1.40±0.05

100

81

1

80

22.00±0.20

20.00±0.10

30

31

0.30±0.08

0.65

12° ±1°

TYP.

(8X)

51

50

SEE DETAIL

A

0.20 MAX.

1.60 MAX.

R 0.08 MIN. 0.20 MAX.

0.25

0° MIN.

SEATING PLANE

STAND-OFF

0.05 MIN.NOTE:

0.15 MAX.

0.10

GAUGE PLANE

-7°

0.60±0.15

1.00 REF.

R 0.08 MIN. 0.20 MAX.

0.20 MIN.

DETAIL A

1.JEDEC STD REF MS-026

2.BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH

3.DIMENSIONS IN MILLIMETERS

51-85050-*B

Intel and Pentium are registered trademarks and i486 is a trademark of Intel Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders.

Document #: 001-00211 Rev. *B

Page 14 of 15

© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1 15CY7C1344H Pin ConfigurationsSelection Guide 133 MHz 100 MHz UnitPin Definitions Functional Overview Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Address Cycle Description Used ZZ Mode Electrical CharacteristicsParameter Description Test Conditions Min Max Unit Adsp Adsc ADV Write CLKBWE BW D BW C BW B BW a Truth Table for Read/Write2Function Ambient Range Maximum RatingsOperating Range Description Test Conditions Min Max UnitAC Test Loads and Waveforms Capacitance9Thermal Resistance9 Switching Characteristics Over the Operating Range 10 CLK Timing DiagramsRead Cycle Timing16 AdscWrite Cycle Timing16 Address Read/Write Timing16, 18Adsp Adsc Burst ReadZZ Mode Timing 20 DON’T CarePin Tqfp 14 x 20 x 1.4 mm Package DiagramOrdering Information REV ECN no Issue Date Orig. Description of ChangeDocument History PCI