Cypress CY7C1344H manual Truth Table for Read/Write2, Function, BWE BW D BW C BW B BW a

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CY7C1344H

Truth Table for Read/Write[2, 3]

Function	GW	BWE	BWD	BWC	BWB	BWA
Read	H	H	X	X	X	X
Read	H	L	H	H	H	H
Write Byte (A, DQPA)	H	L	H	H	H	L
Write Byte (B, DQPB)	H	L	H	H	L	H
Write Bytes (B, A, DQPA, DQPB)	H	L	H	H	L	L
Write Byte (C, DQPC)	H	L	H	L	H	H
Write Bytes (C, A, DQPC, DQPA)	H	L	H	L	H	L
Write Bytes (C, B, DQPC, DQPB)	H	L	H	L	L	H
Write Bytes (C, B, A, DQPC, DQPB, DQPA)	H	L	H	L	L	L
Write Byte (D, DQPD)	H	L	L	H	H	H
Write Bytes (D, A, DQPD, DQPA)	H	L	L	H	H	L
Write Bytes (D, B, DQPD, DQPA)	H	L	L	H	L	H
Write Bytes (D, B, A, DQPD, DQPB, DQPA)	H	L	L	H	L	L
Write Bytes (D, B, DQPD, DQPB)	H	L	L	L	H	H
Write Bytes (D, B, A, DQPD, DQPC, DQPA)	H	L	L	L	H	L
Write Bytes (D, C, A, DQPD, DQPB, DQPA)	H	L	L	L	L	H
Write All Bytes	H	L	L	L	L	L
Write All Bytes	L	X	X	X	X	X

Document #: 001-00211 Rev. *B

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Contents Features Logic Block Diagram Functional Description1Cypress Semiconductor Corporation 15CY7C1344H Pin ConfigurationsSelection Guide 133 MHz 100 MHz UnitPin Definitions Interleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDFunctional Overview Address Cycle Description Used ZZ Mode Electrical CharacteristicsParameter Description Test Conditions Min Max Unit Adsp Adsc ADV Write CLKTruth Table for Read/Write2 FunctionBWE BW D BW C BW B BW a Ambient Range Maximum RatingsOperating Range Description Test Conditions Min Max UnitCapacitance9 Thermal Resistance9AC Test Loads and Waveforms Switching Characteristics Over the Operating Range 10 CLK Timing DiagramsRead Cycle Timing16 AdscWrite Cycle Timing16 Address Read/Write Timing16, 18Adsp Adsc Burst ReadZZ Mode Timing 20 DON’T CarePackage Diagram Ordering InformationPin Tqfp 14 x 20 x 1.4 mm REV ECN no Issue Date Orig. Description of ChangeDocument History PCI