Cypress CY8C23533, CY8C23433 manual Pll, Enable, Gain, 32K Select

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CY8C23433, CY8C23533

Figure 9. PLL Lock Timing Diagram

PLL

Enable

TPLLSLEW

FPLL

PLL

Gain 0

24 MHz

Figure 10. PLL Lock for Low Gain Setting Timing Diagram

PLL

Enable

TPLLSLEWLOW

 

 

24 MHz

 

 

 

 

 

FPLL

PLL

Gain 1

Figure 11. External Crystal Oscillator Startup Timing Diagram

32K

Select

F32K2

32 kHz

TOS

Figure 12. 24 MHz Period Jitter (IMO) Timing Diagram

Jitter24M1

F24M

Figure 13. 32 kHz Period Jitter (ECO) Timing Diagram

Jitter32k

F32K2

Document Number: 001-44369 Rev. *B

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Contents Features Logic Block DiagramPSoC Core PSoC Functional OverviewDigital System Analog System Block Diagram Analog SystemAdditional System Resources PSoC Device CharacteristicsGetting Started Development Kits Technical Training ModulesDevice Editor Development ToolsPSoC Designer Software Subsystems Design BrowserApplication Editor Designing with User ModulesHardware Tools DebuggerNumeric Naming Document ConventionsUnits of Measure Acronyms UsedSCL, ISSP-SCLK PinoutsPin Part Pinout SDA, ISSP-SDATAI2C SCL Pin Definitions 28-Pin Ssop Number Name DescriptionPin I2C SDARegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedRegister Map Bank 0 Table User Space Register Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessACB01CR0 RDI0RO0 ACB01CR1 RDI0RO1 Electrical Specifications Units of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Operational Amplifier Specifications PsrroaLPC supply current DC Low Power Comparator SpecificationsLow power comparator LPC reference voltage Vdd Range LPC voltage offset Document Number 001-44369 Rev. *BDC Analog Output Buffer Specifications PsrrobDC Analog Reference Specifications DC Analog PSoC Block Specifications DC POR and LVD SpecificationsDC Programming Specifications DNL SAR8 ADC DC SpecificationsINL AC Electrical Characteristics AC Chip-Level SpecificationsGain EnablePLL 32K SelectBwoa AC General Purpose IO SpecificationsAC Operational Amplifier Specifications CY8C23433, CY8C23533 Typical Agnd Noise with P24 Bypass AC Low Power Comparator Specifications AC Digital Block SpecificationsKHz Power = Low Power = High AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1Vpp, 3 dB BW, 100 pF Load BwobSAR8 ADC AC Specifications AC External Clock SpecificationsAC Programming Specifications AC I2C Specifications Packaging Information Pin 5x5 mm QFNTypical Package Capacitance on Crystal Pins Capacitance on Crystal PinsSolder Reflow Peak Temperature Thermal ImpedancesOrdering Information Document History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Orig. Submission Description of Change Date