Cypress CY7C68000A Ordering Information, Package Diagrams, Ordering Code Package Type

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CY7C68000A

Ordering Information

Ordering Code

Package Type

CY7C68000A-56LFXC

56 QFN

 

 

CY7C68000A-56BAXC

56 VFBGA

 

 

CY3683

MoBL-USB TX2 Development Board

 

 

Package Diagrams

The MoBL-USB TX2 is available in two packages:

56-pin QFN

56-pin VFBGA

Figure 6. 56-Pin Quad Flatpack No Lead Package 8 x 8 mm (Sawn Version) LS56B

51-85187 *C

Document #: 38-08052 Rev. *G

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Contents MoBL-USBTX2 Features Logic Block DiagramVfbga Cypress Semiconductor Corporation 198 Champion CourtApplications Functional OverviewOperational Modes DPLUS/DMINUS Impedance TerminationOpMode10 Description Pin Configurations CY7C68000ACY7C68000A 56-pin Vfbga Pin Assignment Name Type Default Description1 Pin DescriptionsPin Descriptions By the Transmit State Machine Receive Error XtalinXtalout GNDDC Characteristics Absolute Maximum RatingsOperating Conditions DPLUS/DMINUS/CLKAC Electrical Characteristics Timing Diagram HS/FS Interface Timing 60 MHzHS/FS Interface Timing 30 MHz Package Diagrams Ordering InformationOrdering Code Package Type PCB Layout Recommendations Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56Quad Flat Package No Leads QFN Package Design Notes Cross section of the Area Underneath the QFN PackageSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date