Cypress CY62157E manual Truth Table, Ordering Information, Bhe Ble, Inputs/Outputs Mode Power

Page 9

CY62157E MoBL®

Truth Table

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE1

CE2

 

WE

 

 

OE

 

 

BHE

 

 

BLE

 

Inputs/Outputs

Mode

Power

 

H

X

 

X

 

 

X

 

 

X

 

 

X

 

High Z

Deselect/Power-Down

Standby (ISB)

 

X

L

 

X

 

 

X

 

 

X

 

 

X

 

High Z

Deselect/Power-Down

Standby (ISB)

 

X

X

 

X

 

 

X

 

 

H

 

 

H

 

High Z

Deselect/Power-Down

Standby (ISB)

 

L

H

 

H

 

 

L

 

 

L

 

 

L

 

Data Out (IO0–IO15)

Read

Active (ICC)

 

L

H

 

H

 

 

L

 

 

H

 

 

L

 

Data Out (IO0–IO7);

Read

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Z (IO8–IO15)

 

 

 

L

H

 

H

 

 

L

 

 

L

 

 

H

 

High Z (IO0–IO7);

Read

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data Out (IO8–IO15)

 

 

 

L

H

 

H

 

 

H

 

 

L

 

 

H

 

High Z

Output Disabled

Active (ICC)

 

L

H

 

H

 

 

H

 

 

H

 

 

L

 

High Z

Output Disabled

Active (ICC)

 

L

H

 

H

 

 

H

 

 

L

 

 

L

 

High Z

Output Disabled

Active (ICC)

 

L

H

 

L

 

 

X

 

 

L

 

 

L

 

Data In (IO0–IO15)

Write

Active (ICC)

 

L

H

 

L

 

 

X

 

 

H

 

 

L

 

Data In (IO0–IO7);

Write

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Z (IO8–IO15)

 

 

 

L

H

 

L

 

 

X

 

 

L

 

 

H

 

High Z (IO0–IO7);

Write

Active (ICC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data In (IO8–IO15)

 

 

Ordering Information

Speed

Ordering Code

Package

Package Type

Operating

(ns)

Diagram

Range

 

 

 

 

 

45

CY62157ELL-45ZSXI

51-85087

44-pin Thin Small Outline Package Type II (Pb-free)

Industrial

 

 

 

 

 

55

CY62157ELL-55ZSXE

51-85087

44-pin Thin Small Outline Package Type II (Pb-free)

Automotive

 

CY62157ELL-55BVXE

51-85150

48-ball Very Fine Pitch Ball Grid Array (Pb-free)

 

 

 

 

 

 

Document #: 38-05695 Rev. *C

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Contents Logic Block Diagram FeaturesFunctional Description1 Cypress Semiconductor CorporationTsop Vfbga Product PortfolioMaximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Capacitance9Thermal Resistance9 Data Retention Characteristics Over the Operating RangeAC Test Loads and Waveforms Data Retention Waveform1145 ns 55 ns Parameter Description Min Switching Characteristics Over the Operating RangeMin Max Unit Read Cycle Write CycleRead Cycle 1 Address Transition Controlled16 Switching WaveformsRead Cycle 2 OE Controlled17 50%Write Cycle 2 CE 1 or CE 2 Controlled 15, 19, 20 Write Cycle 1 WE Controlled 15, 19, 20Write Cycle 4 BHE/BLE Controlled, OE LOW20 Write Cycle 3 WE Controlled, OE LOW20Truth Table Inputs/Outputs Mode PowerOrdering Information BHE BLEPin Tsop II Package DiagramsBall Vfbga 6 x 8 x 1 mm Issue Date Orig. Description of Change Document HistoryREV ECN no