Cypress CY14B101Q3, CY14B101Q1, CY14B101Q2 manual AC Switching Characteristics

	CY14B101Q1
PRELIMINARY	CY14B101Q2
	CY14B101Q3

AC Switching Characteristics

Cypress		Alt.			Description		40MHz		Unit
Parameter		Parameter				Min		Max
fSCK	fSCK		Clock Frequency, SCK					40	MHz
tCL	tWL		Clock Pulse Width Low			11			ns
tCH	tWH		Clock Pulse Width High			11			ns
tCS	tCE		CS	High Time		20			ns
tCSS	tCES		CS	Setup Time		10			ns
tCSH	tCEH		CS	Hold Time		10			ns
tSD	tSU		Data In Setup Time			5			ns
tHD	tH		Data In Hold Time			5			ns
tHH	tHD		HOLD		Hold Time	5			ns
tSH	tCD		HOLD		Setup Time	5			ns
tCO	tV		Output Valid					9	ns
tHHZ	tHZ		HOLD		to Output High Z			15	ns
tHLZ	tLZ		HOLD		to Output Low Z			15	ns
tOH	tHO		Output Hold Time			0			ns
tHZCS	tDIS		Output Disable Time					25	ns

Figure 21. Synchronous Data Timing (Mode 0)

CS
	tCSS		tCH
SCK
			tHD
		tSD
SI		VALID IN

SO HI-Z

tCL

tCO

	tCS
tCSH
tOH	tHZCS
	HI-Z

CS

SCK

HOLD

SO

tSH

Figure 22. HOLD Timing

~ ~ ~ ~

tHH

tSH

tHHZ

tHH

tHLZ

Document #: 001-50091 Rev. *A Page 15 of 22

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