Cypress CY14B101Q1 manual Document History, Sales, Solutions, and Legal Information, REV ECN no

Page 22

 

 

 

 

 

 

 

 

CY14B101Q1

 

 

 

 

 

 

PRELIMINARY

CY14B101Q2

 

 

 

 

 

 

CY14B101Q3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document History Page

 

 

 

 

 

 

 

 

 

 

Document Title: CY14B101Q1/CY14B101Q2/CY14B101Q3 1 MBit (128K x 8) Serial SPI nvSRAM

 

Document Number: 001-50091

 

 

 

 

REV.

ECN NO.

Orig. of

Submission

Description of Change

 

Change

Date

 

 

 

 

 

 

 

**

2607408

GSIN/

12/19/08

Updated the “Feature” section

 

 

 

GVCH/AESA

 

 

Updated nvSRAM STORE, RECALL, AutoStore Enable/Disable sections

 

 

 

 

 

 

 

Removed Soft Sequence

 

 

 

 

 

 

 

 

Added SPI instructions for STORE, RECALL, AutoStore Enable and Disable

 

 

 

 

 

 

 

Updated SPI with following changes:

 

 

 

 

 

 

 

 

-- Added more information for protocol

 

 

 

 

 

 

 

 

-- Added four new SPI instruction

 

 

 

 

 

 

 

 

-- WEN bit cleared on CS going high edge after Write instructions and four

 

 

 

 

 

 

 

nvSRAM special instructions

 

 

 

 

 

 

 

 

Added RDY bit to Status Register for indicating Store/Recall in progress

 

 

 

 

 

 

 

Other changes as per new EROS

 

 

 

 

 

 

 

 

Removed 8 SOIC package

 

 

 

 

 

 

 

 

Added two new 8DFN packages

 

 

 

 

 

 

 

 

Changed tCO parameter to 9 ns

 

*A

2654487

GVCH/PYRS

02/04/2009

Moved from Advance information to Preliminary

 

 

 

 

 

 

 

 

Changed part number from CY14B101QxA to CY14B101Qx

 

 

 

 

 

 

 

Updated pin description of VCAP pin

 

 

 

 

 

 

 

 

Updated Device operation and SPI peripheral interface description

 

 

 

 

 

 

 

Added Factory setting values for BP1, BP2 and WPEN bits

 

 

 

 

 

 

 

Updated Real Time Clock operation description

 

 

 

 

 

 

 

 

Changed ICC2 from 5mA to 10mA

 

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.

Products

 

PSoC Solutions

 

PSoC

psoc.cypress.com

General

psoc.cypress.com/solutions

Clocks & Buffers

clocks.cypress.com

Low Power/Low Voltage

psoc.cypress.com/low-power

Wireless

wireless.cypress.com

Precision Analog

psoc.cypress.com/precision-analog

Memories

memory.cypress.com

LCD Drive

psoc.cypress.com/lcd-drive

Image Sensors

image.cypress.com

CAN 2.0b

psoc.cypress.com/can

 

 

USB

psoc.cypress.com/usb

© Cypress Semiconductor Corporation, 2008-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document #: 001-50091 Rev. *A

Revised February 2, 2009

Page 22 of 22

AutoStore and QuantumTrap are trademarks of Cypress Semiconductor Corp. All products and company names mentioned in this document are the trademarks of their respective holders.

[+] Feedback

Image 22
Contents Functional Overview FeaturesLogic Block Diagram Mbit NonVolatile Sram Internally organized as 128K xPin Definitions Pin Name Type Description PinoutsHold Sram Read Device OperationSram Write Store OperationHardware Store and HSB pin Operation Hardware Recall Power UpSoftware Store Operation Recall OperationSerial Peripheral Interface SPI OverviewSystem Configuration Using SPI nvSRAM SPI ModesSPI Operating Features SPI Functional DescriptionRead Status Register Rdsr Instruction Status RegisterWrite Status Register Wrsr Instruction Write Protection and Block Protection Write Enable Wren InstructionWrite Disable Wrdi Instruction Block ProtectionRead Sequence Read Memory AccessWrite Protect WP Pin Write Sequence WriteSoftware Store NvSRAM Special InstructionsNvSRAM Special Instructions Function Name Opcode Operation AutoStore Enable Asenb AutoStore Disable AsdisbHold Pin Operation Operating Range DC Electrical CharacteristicsMaximum Ratings Parameter Description Test Conditions Min Max UnitThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsAC Switching Characteristics Cypress Alt Description 40MHz Unit Parameter Min MaxSwitching Waveforms AutoStore or Power Up RecallParameters Description CY‘4B101QxA Unit Min Max Recall Duration 200 Software Controlled Store and Recall CyclesParameter Description CY14B101Q1 Unit Min Max Soft Sequence Processing Time 100Parameter Description CY14B101Q1 Unit Min To Output Active Time when write latch not setHardware Store Cycle Hardware Store Pulse WidthPart Numbering Nomenclature Ordering Code Package Package Type Operating Diagram RangeOrdering Information CY 14 B 101 Q 1-SF X C TPackage Diagrams Pin 300 mil DFN PackagePin 300 mil Soic Document History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions REV ECN no