Texas Instruments TMS320F2802, TMS320F2809, TMS320F2808 INT1 INT2 INT11 INT12, Mux, Intm

TMS320F2809, TMS320F2808, TMS320F2806

TMS320F2802, TMS320F2801, TMS320C2802

TMS320C2801, TMS320F28016, TMS320F28015

SPRS230L –OCTOBER 2003 –REVISED DECEMBER 2009 www.ti.com

INT1

INT2

INT11

INT12

INTx

MUX

PIEACKx

(Enable/Flag)

IFR(12:1)IER(12:1)

(Flag) (Enable)

(Enable)(Flag)

PIEIERx(8:1) PIEIFRx(8:1)

MUX

INTx.1

INTx.2

INTx.3

INTx.4

INTx.5

INTx.6

INTx.7

INTx.8

INTM

1

CPU 0

Global

Enable

From

Peripherals or

External

Interrupts

Figure 3-8. Multiplexing of Interrupts Using the PIE Block

Table 3-12. PIE Peripheral Interrupts(1)

CPU				PIE INTERRUPTS
INTERRUPTS	INTx.8	INTx.7	INTx.6	INTx.5	INTx.4	INTx.3	INTx.2	INTx.1
INT1	WAKEINT	TINT0	ADCINT	XINT2	XINT1	Reserved	SEQ2INT	SEQ1INT
	(LPM/WD)	(TIMER 0)	(ADC)				(ADC)	(ADC)
INT2	Reserved	Reserved	EPWM6_TZINT	EPWM5_TZINT	EPWM4_TZINT	EPWM3_TZINT	EPWM2_TZINT	EPWM1_TZINT
			(ePWM6)	(ePWM5)	(ePWM4)	(ePWM3)	(ePWM2)	(ePWM1)
INT3	Reserved	Reserved	EPWM6_INT	EPWM5_INT	EPWM4_INT	EPWM3_INT	EPWM2_INT	EPWM1_INT
			(ePWM6)	(ePWM5)	(ePWM4)	(ePWM3)	(ePWM2)	(ePWM1)
INT4	Reserved	Reserved	Reserved	Reserved	ECAP4_INT	ECAP3_INT	ECAP2_INT	ECAP1_INT
					(eCAP4)	(eCAP3)	(eCAP2)	(eCAP1)
INT5	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	EQEP2_INT	EQEP1_INT
							(eQEP2)	(eQEP1)
INT6	SPITXINTD	SPIRXINTD	SPITXINTC	SPIRXINTC	SPITXINTB	SPIRXINTB	SPITXINTA	SPIRXINTA
	(SPI-D)	(SPI-D)	(SPI-C)	(SPI-C)	(SPI-B)	(SPI-B)	(SPI-A)	(SPI-A)
INT7	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved
INT8	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	I2CINT2A	I2CINT1A
							(I2C-A)	(I2C-A)
INT9	ECAN1_INTB	ECAN0_INTB	ECAN1_INTA	ECAN0_INTA	SCITXINTB	SCIRXINTB	SCITXINTA	SCIRXINTA
	(CAN-B)	(CAN-B)	(CAN-A)	(CAN-A)	(SCI-B)	(SCI-B)	(SCI-A)	(SCI-A)
INT10	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved
INT11	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved
INT12	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved	Reserved

(1)Out of the 96 possible interrupts, 43 interrupts are currently used. The remaining interrupts are reserved for future devices. These interrupts can be used as software interrupts if they are enabled at the PIEIFRx level, provided none of the interrupts within the group is being used by a peripheral. Otherwise, interrupts coming in from peripherals may be lost by accidentally clearing their flag while modifying the PIEIFR. To summarize, there are two safe cases when the reserved interrupts could be used as software interrupts:

1)No peripheral within the group is asserting interrupts.

2)No peripheral interrupts are assigned to the group (example PIE group 12).

44	Functional Overview	Copyright © 2003–2009, Texas Instruments Incorporated
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