Texas Instruments TMS320F28016 Standby Mode Timing Requirements, Test Conditions MIN NOM MAX Unit

	TMS320F2809, TMS320F2808, TMS320F2806
	TMS320F2802, TMS320F2801, TMS320C2802
	TMS320C2801, TMS320F28016, TMS320F28015
www.ti.com	SPRS230L –OCTOBER 2003 –REVISED DECEMBER 2009

Table 6-18. STANDBY Mode Timing Requirements

		TEST CONDITIONS	MIN	NOM MAX	UNIT
tw(WAKE-INT)	Pulse duration, external	Without input qualification	3tc(OSCCLK)		cycles
	wake-up signal	With input qualification(1)	(2 + QUALSTDBY) * tc(OSCCLK)

(1)QUALSTDBY is a 6-bit field in the LPMCR0 register.

Table 6-19. STANDBY Mode Switching Characteristics

	PARAMETER	TEST CONDITIONS	MIN TYP	MAX	UNIT
	Delay time, IDLE instruction
td(IDLE-XCOL)executed to XCLKOUT low			32tc(SCO)	45tc(SCO)	cycles
	Delay time, external wake signal
	to program execution resume(1)
	• Wake up from flash	Without input qualifier		100tc(SCO)	cycles
	– Flash module in active	With input qualifier		100tc(SCO) + tw(WAKE-INT)
td(WAKE-STBY)	state
	• Wake up from flash	Without input qualifier		1125tc(SCO)	cycles
	– Flash module in sleep	With input qualifier		1125tc(SCO) + tw(WAKE-INT)
	state
	• Wake up from SARAM	Without input qualifier		100tc(SCO)	cycles
		With input qualifier		100tc(SCO) + tw(WAKE-INT)

(1)This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered by the wake up signal) involves additional latency.

(A)

(B)

Device

Status

Flushing Pipeline

Wake−up

Signal

X1/X2 or

X1 or

XCLKIN

XCLKOUT

(C)		(E)
	(D)	(F)
STANDBY	STANDBY	Normal Execution

tw(WAKE-INT)

td(WAKE-STBY)

td(IDLE−XCOL)

A.IDLE instruction is executed to put the device into STANDBY mode.

B.The PLL block responds to the STANDBY signal. SYSCLKOUT is held for approximately 32 cycles (if CLKINDIV = 0) or 64 cycles (if CLKINDIV = 1) before being turned off. This delay enables the CPU pipe and any other pending operations to flush properly.

C.Clock to the peripherals are turned off. However, the PLL and watchdog are not shut down. The device is now in STANDBY mode.

D.The external wake-up signal is driven active.

E.After a latency period, the STANDBY mode is exited.

F.Normal execution resumes. The device will respond to the interrupt (if enabled).

Figure 6-15. STANDBY Entry and Exit Timing Diagram

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