Data Manual
ROM
Gpio MUX
ROM Timing C280x only
Typical Operational Power Versus Frequency F2808
Warm Reset
TMS320F2809, TMS320F2808, TMS320F2806
Xclkin Timing Requirements PLL Enabled
Check for
Features
Download flash programming software
Getting Started
Acquire the appropriate development tools
Download starter software
Introduction
Feature TYPE1
Hardware Features 100-MHz Devices
Feature
Hardware Features 60-MHz Devices
TMS320F2809, TMS320F2808 100-Pin PZ Lqfp Top View
Pin Assignments
TMS320F2806 100-Pin PZ Lqfp Top View
On the C280x devices, the VDD3VFL pin is Vddio
TMS320F2801x 100-Pin PZ Lqfp Top View
Bottom View
Signal Descriptions
Signal Descriptions
Reset
ADC Signals
CPU and I/O Power Pins
Gpioa and Peripheral Signals 2
Signal Descriptions
TMS320C2801, TMS320F28016, TMS320F28015
TMS320F2809, TMS320F2808, TMS320F2806
GPIO33
Protected by the CODE-SECURITY Module
Functional Block Diagram
F2809 Memory Map
Memory Maps
F2808 Memory Map
F2806 Memory Map
F2802, C2802 Memory Map
F2801, F28015, F28016, C2801 Memory Map
Address Range Program and Data Space
Addresses of Flash Sectors in F2809
Addresses of Flash Sectors in F2808
Addresses of Flash Sectors in F2806, F2802
Impact of Using the Code Security Module
Addresses of Flash Sectors in F2801, F28015, F28016
Address Flash ROM
H0 Saram
Wait-states
Area WAIT-STATES Comments
OTP
Peripheral Bus
Brief Descriptions
1 C28x CPU
Memory Bus Harvard Bus Architecture
7 M0, M1 SARAMs
Real-Time Jtag and Analysis
Flash
6 ROM
Boot ROM
Boot Mode Selection
8 L0, L1, H0 SARAMs
Disclaimer Code Security Module Disclaimer
Security
Oscillator and PLL
Low-Power Modes
Peripheral Interrupt Expansion PIE Block
External Interrupts XINT1, XINT2, Xnmi
Control Peripherals
19 32-Bit CPU-Timers 0, 1
Peripheral Frames 0, 1, 2 PFn
General-Purpose Input/Output Gpio Multiplexer
Register Map
Serial Port Peripherals
Name Address Range
Access Type
Peripheral Frame 0 Registers1
Peripheral Frame 1 Registers1
11. Device Emulation Registers
Device Emulation Registers
Interrupts
10. Peripheral Frame 2 Registers1
External and PIE Interrupt Sources
INT1 INT2 INT11 INT12
MUX
Intm
13. PIE Configuration and Control Registers
External Interrupts
14. External Interrupt Registers
System Control
OSC and PLL Block
15. PLL, Clocking, Watchdog, and Low-Power Mode Registers1
Crystal
External Clock Signal Toggling 0 −V DD
16. Pllcr Register Bit Definitions
17. Possible PLL Configuration Modes
PLL Mode Remarks Pllstsclkindiv Sysclkout Clkin
PLL-Based Clock Module
Loss of Input Clock
Watchdog Block
Oscclk Clkin Sysclkout
Low-Power Modes Block
18. Low-Power Modes
LPMCR010
Pschpsc TCR.4
32-Bit CPU-Timers 0/1/2
Tddrhtddr
Prdhprd
CPU-Timers 0, 1, 2 Configuration and Control Registers
Enhanced PWM Modules ePWM1/2/3/4/5/6
EPWM Control and Status Registers
EPWM1 EPWM2 EPWM3 EPWM4 EPWM5 EPWM6 Size
#SHADOW
CTR = Zero
Enhanced CAP Modules eCAP1/2/3/4
Hi-Resolution PWM Hrpwm
CTR=PRD CTR=CMP
Ctrphs
Ctrovf OVF
RST
ECAP Control and Status Registers
ECAP1 ECAP2 ECAP3 ECAP4
Size Description
Enhanced QEP Modules eQEP1/2
Address #SHADOW
EQEP Control and Status Registers
EQEP1 EQEP2
Register Description
Enhanced Analog-to-Digital Converter ADC Module
ADCINB0 ADCINB7
Sysclkout DSP Adcenclk Halt Hspclk
ADCINA0
ADCINA7
Adcrefin
ADCINA70
ADCINB70
Adclo
Adcresext
ADC Connections if the ADC Is Not Used
ADC Registers1
ADC Registers
Peripherals
Can Bus
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
SN65HVD23x
11. eCAN-A Memory Map
12. eCAN-B Memory Map
Size Description Address
Can Register Map1
Register Name
ECAN-A ECAN-B
Serial Communications Interface SCI Modules SCI-A, SCI-B
SCI-B Registers1
SCI-A Registers1
13. Serial Communications Interface SCI Module Block Diagram
When Spibrr = 3 to
11. SPI-B Registers
10. SPI-A Registers
13. SPI-D Registers
12. SPI-C Registers
−−−−−
14. SPI Module Block Diagram Slave Mode
Inter-Integrated Circuit I2C
Sysrs
14. I2C-A Registers
Gpio MUX Sdaa Scla
I2CAENCLK I2C−A C28X CPU Sysclkout
Gpioxnmisel
Gpiolmpsel GPIOXINT1SEL GPIOXINT2SEL
15. Gpio Registers
Gpio Control Registers Eallow Protected
Gpio Data Registers not Eallow Protected
GPAMUX2
16. F2808 Gpio MUX Table
GPAMUX1/2
GPAMUX1
Sync Sysclkout
Time between samples GPyCTRL Reg GPIOx
Device and Development Support Tool Nomenclature
Software Development Tools
Hardware Development Tools
Device Family
Temperature Range
TMS
Prefix
Peripheral Guide
Documentation Support
TMS320x280x, 2801x Peripheral Selection Guide
Literature
Application Programming Interface API Reference
TMS320C28x
C28x FPU Primer
Application Reports and Software
TMS320x281x to TMS320x2833x or 2823x Migration Overview
TMS320x280x to TMS320x2833x or 2823x Migration Overview
Software
SPRA820
Device Support
Absolute Maximum Ratings1
Electrical Specifications
Parameter Test Conditions MIN TYP MAX Unit
Electrical Characteristics
Recommended Operating Conditions
MIN NOM MAX Unit
Sysclkout
Current Consumption
TYP5 MAX6
SCI-A SPI-A ADC
TYP4 MAX5
SCI SPI
Reducing Current Consumption
Peripheral DD Current Module
ADC I2C
Iddio
Total Power
Current Consumption Graphs
IDD IDDA18
Typical Operational Current Versus Frequency C280x
Typical Operational Power Versus Frequency C280x
EMU0 EMU1 Trst TMS TDI TDO TCK DSP GND Tckret Jtagheader
Emulator Connection Without Signal Buffering for the DSP
85 pF
Timing Parameter Symbology
General Notes on Timing Parameters
Test Load Circuit
TMS320x280x Clock Table and Nomenclature 100-MHz Devices
Device Clock Table
Input Clock Frequency
Clock Requirements and Characteristics
XCLKIN1 Timing Requirements PLL Enabled
10. XCLKIN1 Timing Requirements PLL Disabled
Xclkina Xclkoutb
Power Sequencing
Power Management and Supervisory Circuit Solutions
12. Power Management and Supervisory Circuit Solutions
OSCCLK/8A
Xclkout
13. Reset XRS Timing Requirements
Xclkout XRS
OSCCLK/8
Sysclkout Oscclk OSCCLK/2
14. General-Purpose Output Switching Characteristics
General-Purpose Input/Output Gpio
Gpio Output Timing
Output From Qualifier
Gpio Signal GPxQSELn = 1,0 6 samples
Gpio Input Timing
Sysclkout Qualprd = 1 SYSCLKOUT/2
Sampling Window Width for Input Signals
Case
GPIOxn
Address/Data Internal
Low-Power Mode Wakeup Timing
16. Idle Mode Timing Requirements1
17. Idle Mode Switching Characteristics1
Xclkin Xclkout Standby
18. Standby Mode Timing Requirements
19. Standby Mode Switching Characteristics
Test Conditions MIN NOM MAX Unit
21. Halt Mode Switching Characteristics
20. Halt Mode Timing Requirements
Trip-Zone Input Timing
23. ePWM Switching Characteristics
Enhanced Control Peripherals
Enhanced Pulse Width Modulator ePWM Timing
MIN TYP MAX Unit
27. eCAP Switching Characteristics
29. eQEP Switching Characteristics
26. Enhanced Capture eCAP Timing Requirement1
Adcsocbo
32. External Interrupt Switching Characteristics1
External Interrupt Timing
Parameter
Vddio
10.4 I2C Electrical Specification and Timing
Serial Peripheral Interface SPI Master Mode Timing
33. I2C Timing
34. SPI Master Mode External Timing Clock Phase = 0 1 2 3 4
Spisimo
Spisomi Master In Data Must Be Valid
Spistea
35. SPI Master Mode External Timing Clock Phase = 1 1 2 3 4
Spisomi
Spiclk
Clock polarity =
Data Valid
36. SPI Slave Mode External Timing Clock Phase = 01 2 3 4
SPI Slave Mode Timing
Spisimo Data Must Be Valid
37. SPI Slave Mode External Timing Clock Phase = 11 2
On-Chip Analog-to-Digital Converter
ADC Power-Up Control Bit Timing
ADCIN0
Analog Inputs
Converter
Conversion Modes
Sequential Sampling Mode Single-Channel Smode =
AT 12.5 MHz Sample n Sample n +
ADC Clock Remarks
Simultaneous Sampling Mode Dual-Channel Smode =
Detailed Descriptions
Flash Timing
43. Flash Endurance for a and S Temperature Material1
44. Flash Endurance for Q Temperature Material1
46. Flash/OTP Access Timing
Flash Flash Random OTP WAIT-STATE
48. ROM/OTP Access Timing
ROM Timing C280x only
Sysclkout ns
Migration Issues
ADDITIONS, DELETIONS, and Modifications
C280x Thermal Model 100-pin PZ Results
F280x Thermal Model 100-pin GGM Results
F280x Thermal Model 100-pin PZ Results
C280x Thermal Model 100-pin GGM Results
ΨJTC/W
F2809 Thermal Model 100-pin PZ Results
Package Type Pins Package Qty Eco Plan Lead
Orderable Device
Samples
Package Qty Eco Plan Lead
Microstar TMS320F2806GGMS Active
TMS320F2802ZGMA Active
TMS320F2802ZGMS Active
TMS320F2806GGMA Active
TMS320F2809ZGMS Active
TMS320F2809ZGMA Active
4145257-3/C 12/01
GGM S-PBGA-N100
10,10 20 TYP
40 MAX
Page
Plastic Quad Flatpack
PZ S-PQFP-G100
Products Applications
DSP
Rfid
77 
78 
79 
80
94 
95 
96 
97 
98 
99 
100
VSS
GPIO3/EPWM2B/SPISOMID
GPIO0/EPWM1A
VDDIO
GPIO2/EPWM2A
GPIO1/EPWM1B/SPISIMOD
GPIO34
ADCRESEXT
ADCREFP
ADCREFM
ADCREFIN
ADCINB7
ADCINB6
ADCINB5
ADCINB4
ADCINB3
ADCINB0
VDDAIO