Texas Instruments TMS320F2808, TMS320F2809, TMS320C2802, TMS320C2801, TMS320F2801 System Control

TMS320F2809, TMS320F2808, TMS320F2806

TMS320F2802, TMS320F2801, TMS320C2802

TMS320C2801, TMS320F28016, TMS320F28015

SPRS230L –OCTOBER 2003 –REVISED DECEMBER 2009 www.ti.com

Each external interrupt can be enabled/disabled or qualified using positive, negative, or both positive and negative edge. For more information, see the TMS320x280x, 2801x, 2804x DSP System Control and Interrupts Reference Guide (literature number SPRU712).

3.6System Control

This section describes the 280x oscillator, PLL and clocking mechanisms, the watchdog function and the low power modes. Figure 3-9shows the various clock and reset domains in the 280x devices that will be discussed.

Reset

SYSCLKOUT(A)

Peripheral Reset

CLKIN(A)

28x
CPU
	Peripheral	CPU
		Timers
	Registers
	System	Clock Enables
	Control
	Registers
	Peripheral	ePWM 1/2/3/4/5/6
	Registers	eCAP 1/2/3/4 eQEP 1/2
Bus	Peripheral	eCAN-A/B
	Registers	I2C-A
Peripheral	Low-Speed Prescaler
		LSPCLK
	Peripheral	Low-Speed Peripherals
	Registers	SCI-A/B, SPI-A/B/C/D
	High-Speed Prescaler
		HSPCLK
	ADC	12-Bit ADC
	Registers

Watchdog			XRS
Block			X1
PLL	OSC
			X2
Power		XCLKIN
Modes
Control

I/O

I/O

GPIO GPIOs

MUX

I/O

16 ADC inputs

A.CLKIN is the clock into the CPU. It is passed out of the CPU as SYSCLKOUT (that is, CLKIN is the same frequency as SYSCLKOUT).

Figure 3-9. Clock and Reset Domains

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