Texas Instruments TMS320F2801 Low-Power Mode Wakeup Timing, Idle Mode Timing Requirements1

TMS320F2809, TMS320F2808, TMS320F2806

TMS320F2802, TMS320F2801, TMS320C2802

TMS320C2801, TMS320F28016, TMS320F28015

SPRS230L –OCTOBER 2003 –REVISED DECEMBER 2009 www.ti.com

6.9.4Low-Power Mode Wakeup Timing

Table 6-16shows the timing requirements, Table 6-17shows the switching characteristics, and Figure 6-14shows the timing diagram for IDLE mode.

Table 6-16. IDLE Mode Timing Requirements(1)

			MIN NOM MAX	UNIT
tw(WAKE-INT)	Pulse duration, external wake-up signal	Without input qualifier	2tc(SCO)	cycles
		With input qualifier	5tc(SCO) + tw(IQSW)

(1)For an explanation of the input qualifier parameters, see Table 6-15 .

Table 6-17. IDLE Mode Switching Characteristics(1)

		PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
	Delay time, external wake signal to
	program execution resume (2)
	•	Wake-up from Flash	Without input qualifier			20tc(SCO)	cycles
td(WAKE-IDLE)		– Flash module in active state	With input qualifier			20tc(SCO) + tw(IQSW)
	•	Wake-up from Flash	Without input qualifier			1050tc(SCO)	cycles
		– Flash module in sleep state	With input qualifier			1050tc(SCO) + tw(IQSW)
	•	Wake-up from SARAM	Without input qualifier			20tc(SCO)	cycles
			With input qualifier			20tc(SCO) + tw(IQSW)

(1)For an explanation of the input qualifier parameters, see Table 6-15 .

(2)This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered by the wake up) signal involves additional latency.

td(WAKE−IDLE)

Address/Data

(internal)

XCLKOUT

tw(WAKE−INT)

WAKE INT(A)

A.WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.

Figure 6-14. IDLE Entry and Exit Timing

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