Data Manual
ROM
Gpio MUX
ROM Timing C280x only
Typical Operational Power Versus Frequency F2808
Warm Reset
TMS320F2809, TMS320F2808, TMS320F2806
Xclkin Timing Requirements PLL Enabled
Features
Check for
Download starter software
Getting Started
Acquire the appropriate development tools
Download flash programming software
Introduction
Hardware Features 100-MHz Devices
Feature TYPE1
Hardware Features 60-MHz Devices
Feature
Pin Assignments
TMS320F2809, TMS320F2808 100-Pin PZ Lqfp Top View
TMS320F2806 100-Pin PZ Lqfp Top View
On the C280x devices, the VDD3VFL pin is Vddio
TMS320F2801x 100-Pin PZ Lqfp Top View
Bottom View
Signal Descriptions
Signal Descriptions
CPU and I/O Power Pins
Reset
ADC Signals
Gpioa and Peripheral Signals 2
Signal Descriptions
TMS320F2809, TMS320F2808, TMS320F2806
TMS320C2801, TMS320F28016, TMS320F28015
GPIO33
Functional Block Diagram
Protected by the CODE-SECURITY Module
Memory Maps
F2809 Memory Map
F2808 Memory Map
F2806 Memory Map
F2802, C2802 Memory Map
F2801, F28015, F28016, C2801 Memory Map
Addresses of Flash Sectors in F2806, F2802
Addresses of Flash Sectors in F2809
Addresses of Flash Sectors in F2808
Address Range Program and Data Space
Address Flash ROM
Impact of Using the Code Security Module
Addresses of Flash Sectors in F2801, F28015, F28016
OTP
Wait-states
Area WAIT-STATES Comments
H0 Saram
Memory Bus Harvard Bus Architecture
Brief Descriptions
1 C28x CPU
Peripheral Bus
6 ROM
Real-Time Jtag and Analysis
Flash
7 M0, M1 SARAMs
8 L0, L1, H0 SARAMs
Boot ROM
Boot Mode Selection
Security
Disclaimer Code Security Module Disclaimer
External Interrupts XINT1, XINT2, Xnmi
Low-Power Modes
Peripheral Interrupt Expansion PIE Block
Oscillator and PLL
General-Purpose Input/Output Gpio Multiplexer
19 32-Bit CPU-Timers 0, 1
Peripheral Frames 0, 1, 2 PFn
Control Peripherals
Serial Port Peripherals
Register Map
Peripheral Frame 1 Registers1
Access Type
Peripheral Frame 0 Registers1
Name Address Range
10. Peripheral Frame 2 Registers1
Device Emulation Registers
Interrupts
11. Device Emulation Registers
External and PIE Interrupt Sources
Intm
INT1 INT2 INT11 INT12
MUX
14. External Interrupt Registers
13. PIE Configuration and Control Registers
External Interrupts
System Control
15. PLL, Clocking, Watchdog, and Low-Power Mode Registers1
OSC and PLL Block
External Clock Signal Toggling 0 −V DD
Crystal
PLL-Based Clock Module
17. Possible PLL Configuration Modes
PLL Mode Remarks Pllstsclkindiv Sysclkout Clkin
16. Pllcr Register Bit Definitions
Loss of Input Clock
Watchdog Block
LPMCR010
Low-Power Modes Block
18. Low-Power Modes
Oscclk Clkin Sysclkout
Prdhprd
32-Bit CPU-Timers 0/1/2
Tddrhtddr
Pschpsc TCR.4
CPU-Timers 0, 1, 2 Configuration and Control Registers
Enhanced PWM Modules ePWM1/2/3/4/5/6
#SHADOW
EPWM Control and Status Registers
EPWM1 EPWM2 EPWM3 EPWM4 EPWM5 EPWM6 Size
CTR = Zero
Hi-Resolution PWM Hrpwm
Enhanced CAP Modules eCAP1/2/3/4
RST
Ctrphs
Ctrovf OVF
CTR=PRD CTR=CMP
Size Description
ECAP Control and Status Registers
ECAP1 ECAP2 ECAP3 ECAP4
Enhanced QEP Modules eQEP1/2
Register Description
EQEP Control and Status Registers
EQEP1 EQEP2
Address #SHADOW
Enhanced Analog-to-Digital Converter ADC Module
ADCINA7
Sysclkout DSP Adcenclk Halt Hspclk
ADCINA0
ADCINB0 ADCINB7
Adclo
ADCINA70
ADCINB70
Adcrefin
ADC Connections if the ADC Is Not Used
Adcresext
ADC Registers
ADC Registers1
Peripherals
SN65HVD23x
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
Can Bus
11. eCAN-A Memory Map
12. eCAN-B Memory Map
ECAN-A ECAN-B
Can Register Map1
Register Name
Size Description Address
Serial Communications Interface SCI Modules SCI-A, SCI-B
SCI-A Registers1
SCI-B Registers1
13. Serial Communications Interface SCI Module Block Diagram
When Spibrr = 3 to
10. SPI-A Registers
11. SPI-B Registers
12. SPI-C Registers
13. SPI-D Registers
14. SPI Module Block Diagram Slave Mode
−−−−−
Inter-Integrated Circuit I2C
I2CAENCLK I2C−A C28X CPU Sysclkout
14. I2C-A Registers
Gpio MUX Sdaa Scla
Sysrs
Gpiolmpsel GPIOXINT1SEL GPIOXINT2SEL
Gpioxnmisel
Gpio Data Registers not Eallow Protected
15. Gpio Registers
Gpio Control Registers Eallow Protected
GPAMUX1
16. F2808 Gpio MUX Table
GPAMUX1/2
GPAMUX2
Time between samples GPyCTRL Reg GPIOx
Sync Sysclkout
Hardware Development Tools
Device and Development Support Tool Nomenclature
Software Development Tools
Prefix
Temperature Range
TMS
Device Family
Literature
Documentation Support
TMS320x280x, 2801x Peripheral Selection Guide
Peripheral Guide
TMS320C28x
Application Programming Interface API Reference
TMS320x280x to TMS320x2833x or 2823x Migration Overview
Application Reports and Software
TMS320x281x to TMS320x2833x or 2823x Migration Overview
C28x FPU Primer
SPRA820
Software
Device Support
Electrical Specifications
Absolute Maximum Ratings1
MIN NOM MAX Unit
Electrical Characteristics
Recommended Operating Conditions
Parameter Test Conditions MIN TYP MAX Unit
Current Consumption
Sysclkout
TYP5 MAX6
SCI-A SPI-A ADC
TYP4 MAX5
ADC I2C
Reducing Current Consumption
Peripheral DD Current Module
SCI SPI
IDD IDDA18
Total Power
Current Consumption Graphs
Iddio
Typical Operational Power Versus Frequency C280x
Typical Operational Current Versus Frequency C280x
Emulator Connection Without Signal Buffering for the DSP
EMU0 EMU1 Trst TMS TDI TDO TCK DSP GND Tckret Jtagheader
Test Load Circuit
Timing Parameter Symbology
General Notes on Timing Parameters
85 pF
Device Clock Table
TMS320x280x Clock Table and Nomenclature 100-MHz Devices
10. XCLKIN1 Timing Requirements PLL Disabled
Clock Requirements and Characteristics
XCLKIN1 Timing Requirements PLL Enabled
Input Clock Frequency
12. Power Management and Supervisory Circuit Solutions
Power Sequencing
Power Management and Supervisory Circuit Solutions
Xclkina Xclkoutb
Xclkout
OSCCLK/8A
OSCCLK/8
13. Reset XRS Timing Requirements
Xclkout XRS
Gpio Output Timing
14. General-Purpose Output Switching Characteristics
General-Purpose Input/Output Gpio
Sysclkout Oscclk OSCCLK/2
Sysclkout Qualprd = 1 SYSCLKOUT/2
Gpio Signal GPxQSELn = 1,0 6 samples
Gpio Input Timing
Output From Qualifier
GPIOxn
Sampling Window Width for Input Signals
Case
17. Idle Mode Switching Characteristics1
Low-Power Mode Wakeup Timing
16. Idle Mode Timing Requirements1
Address/Data Internal
Test Conditions MIN NOM MAX Unit
18. Standby Mode Timing Requirements
19. Standby Mode Switching Characteristics
Xclkin Xclkout Standby
20. Halt Mode Timing Requirements
21. Halt Mode Switching Characteristics
Enhanced Pulse Width Modulator ePWM Timing
23. ePWM Switching Characteristics
Enhanced Control Peripherals
Trip-Zone Input Timing
26. Enhanced Capture eCAP Timing Requirement1
27. eCAP Switching Characteristics
29. eQEP Switching Characteristics
MIN TYP MAX Unit
Parameter
32. External Interrupt Switching Characteristics1
External Interrupt Timing
Adcsocbo
33. I2C Timing
10.4 I2C Electrical Specification and Timing
Serial Peripheral Interface SPI Master Mode Timing
Vddio
34. SPI Master Mode External Timing Clock Phase = 0 1 2 3 4
Spistea
Spisimo
Spisomi Master In Data Must Be Valid
35. SPI Master Mode External Timing Clock Phase = 1 1 2 3 4
Data Valid
Spiclk
Clock polarity =
Spisomi
SPI Slave Mode Timing
36. SPI Slave Mode External Timing Clock Phase = 01 2 3 4
37. SPI Slave Mode External Timing Clock Phase = 11 2
Spisimo Data Must Be Valid
On-Chip Analog-to-Digital Converter
ADC Power-Up Control Bit Timing
Conversion Modes
Analog Inputs
Converter
ADCIN0
ADC Clock Remarks
Sequential Sampling Mode Single-Channel Smode =
AT 12.5 MHz Sample n Sample n +
Simultaneous Sampling Mode Dual-Channel Smode =
Detailed Descriptions
46. Flash/OTP Access Timing
43. Flash Endurance for a and S Temperature Material1
44. Flash Endurance for Q Temperature Material1
Flash Timing
Sysclkout ns
48. ROM/OTP Access Timing
ROM Timing C280x only
Flash Flash Random OTP WAIT-STATE
Migration Issues
ADDITIONS, DELETIONS, and Modifications
C280x Thermal Model 100-pin GGM Results
F280x Thermal Model 100-pin GGM Results
F280x Thermal Model 100-pin PZ Results
C280x Thermal Model 100-pin PZ Results
F2809 Thermal Model 100-pin PZ Results
ΨJTC/W
Samples
Package Type Pins Package Qty Eco Plan Lead
Orderable Device
Package Qty Eco Plan Lead
TMS320F2806GGMA Active
TMS320F2802ZGMA Active
TMS320F2802ZGMS Active
Microstar TMS320F2806GGMS Active
TMS320F2809ZGMA Active
TMS320F2809ZGMS Active
40 MAX
GGM S-PBGA-N100
10,10 20 TYP
4145257-3/C 12/01
Page
PZ S-PQFP-G100
Plastic Quad Flatpack
Rfid
Products Applications
DSP
VSS
GPIO3/EPWM2B/SPISOMID
GPIO0/EPWM1A
VDDIO
GPIO2/EPWM2A
GPIO1/EPWM1B/SPISIMOD
GPIO34
VDD
VSS
VDD2A18
VSS2AGND
ADCRESEXT
ADCREFP
ADCREFM
ADCREFIN
ADCINB6
ADCINB5
ADCINB4
ADCINB3
ADCINB2
ADCINB0
VDDAIO 25