Texas Instruments TMS320F28015 Functional Block Diagram, Protected by the CODE-SECURITY Module

TMS320F2809, TMS320F2808, TMS320F2806

TMS320F2802, TMS320F2801, TMS320C2802

TMS320C2801, TMS320F28016, TMS320F28015

www.ti.com SPRS230L –OCTOBER 2003 –REVISED DECEMBER 2009

3	Functional Overview
						Memory Bus
		TINT0		32-bit CPU TIMER 0			Real-Time JTAG
							(TDI, TDO, TRST, TCK,
			TINT1	32-bit CPU TIMER 1		7	TMS, EMU0, EMU1)
			TINT2	32-bit CPU TIMER 2
						INT14	M0 SARAM
							1K x 16
				PIE			M1 SARAM
				(96 Interrupts)(A)
							1K x 16
						INT[12:1]
				External Interrupt		NMI, INT13	L0 SARAM
							4K x 16
				Control
			32				(0-wait)
			4	SCI-A/B	FIFO		L1 SARAM(B)
			16				4K x 16
					FIFO		(0-wait)
				SPI-A/B/C/D
			2	I2C-A	FIFO		H0 SARAM(C)
							8K x 16
			4				(0-wait)
				eCAN-A/B (32 mbox)
		MUX
			8	eQEP1/2
		GPIO
	GPIOs		4	eCAP1/2/3/4		C28x CPU	ROM
				(4 timers 32-bit)		(100 MHz)	32K x 16 (C2802)
	(35)						16K x 16 (C2801)
			12
			6	ePWM1/2/3/4/5/6
				(12 PWM outputs,
				6 trip zones,
				6 timers 16-bit)
							FLASH
							128K x 16 (F2809)
							64K x 16 (F2808)
							32K x 16 (F2806)
			32			SYSCLKOUT	32K x 16 (F2802)
							16K x 16 (F2801)
				System Control			16K x 16 (F2801x)
		XCLKOUT				RS
		XRS		(Oscillator, PLL,
				Peripheral Clocking,		CLKIN
		XCLKIN
				Low-Power Modes,
		X1					OTP(D)
				Watchdog)
		X2					1K x 16
			ADCSOCA/B
			SOCA/B				Boot ROM
							4K x 16
				12-Bit ADC
							(1-wait state)
		16 Channels
		PROTECTED BY THE CODE-SECURITY MODULE.				Peripheral Bus

A.43 of the possible 96 interrupts are used on the devices.

B.Not available in F2802, F2801, C2802, and C2801.

C.Not available in F2806, F2802, F2801, C2802, and C2801.

D.The 1K x 16 OTP has been replaced with 1K x 16 ROM for C280x devices.

Figure 3-1. Functional Block Diagram

Copyright © 2003–2009, Texas Instruments Incorporated Functional Overview 25

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Product Folder Link(s): TMS320F2809 TMS320F2808 TMS320F2806 TMS320F2802 TMS320F2801 TMS320C2802

TMS320C2801 TMS320F28016 TMS320F28015