Cypress CY14B101Q3, CY14B101Q2 Hardware Store Cycle, Parameter Description CY14B101Q1 Unit Min

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CY14B101Q1

 

 

 

 

 

PRELIMINARY

CY14B101Q2

 

 

CY14B101Q3

 

 

 

 

 

 

 

 

 

 

Hardware STORE Cycle

Parameter

 

 

Description

CY14B101Q1

Unit

 

 

Min

Max

 

 

 

 

 

tDHSB

 

 

To Output Active Time when write latch not set

 

25

ns

HSB

 

tPHSB

 

Hardware STORE Pulse Width

15

 

ns

Switching Waveforms

Write Latch set

tPHSB

HSB (IN)

tDELAY

HSB (OUT)

SO

RWI

Figure 26. Hardware STORE Cycle[8]

~ ~

 

tSTORE

~

~~

 

~

tHHHD

tLZHSB

Write Latch not set

tPHSB

HSB (IN)

HSB

(OUT)

tDELAY

 

 

RWI

 

~ ~

tDHSB

HSB pin is driven high to VCC only by Internal 100K: resistor, HSB driver is disabled

SRAM is disabled as long as HSB (IN) is driven LOW.

tDHSB

~ ~

Document #: 001-50091 Rev. *A

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Contents Functional Overview FeaturesLogic Block Diagram Mbit NonVolatile Sram Internally organized as 128K xPinouts Pin Definitions Pin Name Type DescriptionHold Sram Read Device OperationSram Write Store OperationHardware Store and HSB pin Operation Hardware Recall Power UpSoftware Store Operation Recall OperationSerial Peripheral Interface SPI OverviewSystem Configuration Using SPI nvSRAM SPI ModesSPI Operating Features SPI Functional DescriptionStatus Register Read Status Register Rdsr InstructionWrite Status Register Wrsr Instruction Write Protection and Block Protection Write Enable Wren InstructionWrite Disable Wrdi Instruction Block ProtectionRead Sequence Read Memory AccessWrite Protect WP Pin Write Sequence WriteNvSRAM Special Instructions Software StoreNvSRAM Special Instructions Function Name Opcode Operation AutoStore Disable Asdisb AutoStore Enable AsenbHold Pin Operation Operating Range DC Electrical CharacteristicsMaximum Ratings Parameter Description Test Conditions Min Max UnitThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsAC Switching Characteristics Cypress Alt Description 40MHz Unit Parameter Min MaxAutoStore or Power Up Recall Switching WaveformsParameters Description CY‘4B101QxA Unit Min Max Recall Duration 200 Software Controlled Store and Recall CyclesParameter Description CY14B101Q1 Unit Min Max Soft Sequence Processing Time 100Parameter Description CY14B101Q1 Unit Min To Output Active Time when write latch not setHardware Store Cycle Hardware Store Pulse WidthPart Numbering Nomenclature Ordering Code Package Package Type Operating Diagram RangeOrdering Information CY 14 B 101 Q 1-SF X C TPackage Diagrams Pin 300 mil DFN PackagePin 300 mil Soic Document History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions REV ECN no
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