Cypress CY14B101Q1, CY14B101Q3, CY14B101Q2 manual AutoStore or Power Up Recall, Switching Waveforms

Page 16

CY14B101Q1

CY14B101Q2

PRELIMINARYCY14B101Q3

AutoStore or Power Up RECALL

Parameters			Description	CY‘4B101QxA		Unit
Parameters			Description	Min	Max	Unit
				Min	Max
tFA [7]		Power Up RECALL Duration			20	ms
tSTORE [8]		STORE Cycle Duration			8	ms
tDELAY [9]		Time Allowed to Complete SRAM Cycle			25	ns
VSWITCH		Low Voltage Trigger Level			2.65	V
tVCCRISE		VCC Rise Time		150		μs
VHDIS[6]		HSB	Output Driver Disable Voltage		1.9	V
tLZHSB		HSB	To Output Active Time		5	μs
tHHHD		HSB	High Active Time		500	ns

Switching Waveforms

Figure 23. AutoStore or Power Up RECALL[10]

VSWITCH

VHDIS

HSB OUT

Autostore

POWER-UP

RECALL

Read and Write Inhibited (RWI)

VVCCRISE		Note8	tSTORE		Note8	tSTORE
	tHHHD				tHHHD	Note11
	tHHHD				tHHHD
					tDELAY
	tLZHSB				tLZHSB
		tDELAY
	tFA				tFA
POWER-UP	Read and Write	BROWN		POWER-UP	Read and Write	POWER
RECALL		OUT		RECALL		DOWN
		AUTOSTORE			AUTOSTORE

Notes

7.tFA starts from the time VCC rises above VSWITCH.

8.If an SRAM write has not taken place since the last nonvolatile cycle, AutoStore or Hardware Store is not initiated

9.On a Hardware STORE, Software Store / RECALL, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time tDELAY.

10.Read and Write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.

11.HSB pin is driven high to VCC only by internal 100kOhm resistor, HSB driver is disabled.

Document #: 001-50091 Rev. *A

Page 16 of 22

[+] Feedback

Image 16

Contents Features Logic Block DiagramFunctional Overview Mbit NonVolatile Sram Internally organized as 128K xPin Definitions Pin Name Type Description PinoutsHold Device Operation Sram WriteSram Read Store OperationHardware Recall Power Up Software Store OperationHardware Store and HSB pin Operation Recall OperationSerial Peripheral Interface SPI OverviewSystem Configuration Using SPI nvSRAM SPI ModesSPI Operating Features SPI Functional DescriptionRead Status Register Rdsr Instruction Status RegisterWrite Status Register Wrsr Instruction Write Enable Wren Instruction Write Disable Wrdi InstructionWrite Protection and Block Protection Block ProtectionMemory Access Write Protect WP PinRead Sequence Read Write Sequence WriteSoftware Store NvSRAM Special InstructionsNvSRAM Special Instructions Function Name Opcode Operation AutoStore Enable Asenb AutoStore Disable AsdisbHold Pin Operation DC Electrical Characteristics Maximum RatingsOperating Range Parameter Description Test Conditions Min Max UnitData Retention and Endurance CapacitanceThermal Resistance AC Test ConditionsAC Switching Characteristics Cypress Alt Description 40MHz Unit Parameter Min MaxSwitching Waveforms AutoStore or Power Up RecallParameters Description CY‘4B101QxA Unit Min Max Software Controlled Store and Recall Cycles Parameter Description CY14B101Q1 Unit Min MaxRecall Duration 200 Soft Sequence Processing Time 100To Output Active Time when write latch not set Hardware Store CycleParameter Description CY14B101Q1 Unit Min Hardware Store Pulse WidthOrdering Code Package Package Type Operating Diagram Range Ordering InformationPart Numbering Nomenclature CY 14 B 101 Q 1-SF X C TPackage Diagrams Pin 300 mil DFN PackagePin 300 mil Soic Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History REV ECN no