Cypress CY14B101P manual Software Recall Recall, AutoStore Disable Asdisb, AutoStore Enable Asenb

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PRELIMINARYCY14B101P

bit is cleared on the positive edge of CS following the STORE instruction.

Software Recall (RECALL)

When a RECALL instruction is executed, CY14B101P performs a Software Recall operation. To issue this instruction, the device must be write enabled (WEN = ‘1’).

The instruction is performed by transmitting the RECALL opcode on the SI pin following the falling edge of CS. The WEN bit is cleared on the positive edge of CS following the RECALL instruction.

Figure 17. Software RECALL Operation

 

CS

 

 

 

 

 

 

 

 

 

0

1

2

3

4

5

6

7

SCK

 

 

 

 

 

 

 

 

SI

0

1

1

0

0

0

0

0

SO

 

 

 

Hi-Z

 

 

 

 

 

 

 

 

 

 

 

AutoStore Disable (ASDISB)

AutoStore is enabled by default in CY14B101P. The AutoStore Disable instruction disables the AutoStore on CY14B101P. This setting is not nonvolatile and needs to be followed by a STORE sequence if this is desired to survive power cycle.

To issue this instruction, the device must be write enabled (WEN

=‘1’). The instruction is performed by transmitting the ASDISB opcode on the SI pin following the falling edge of CS. The WEN

bit is cleared on the positive edge of CS following the ASDISB instruction.

.

Figure 18. AutoStore Disable Operation

CS

 

 

 

 

 

 

 

 

 

0

1

2

3

4

5

6

7

SCK

 

 

 

 

 

 

 

 

SI

0

0

0

1

1

0

0

1

SO

 

 

 

Hi-Z

 

 

 

 

 

 

 

 

 

 

 

AutoStore Enable (ASENB)

The AutoStore Enable instruction enables the AutoStore on CY14B101P. This setting is not nonvolatile and needs to be followed by a STORE sequence if this is desired to survive power cycle.

To issue this instruction, the device must be write enabled (WEN

=‘1’). The instruction is performed by transmitting the ASENB opcode on the SI pin following the falling edge of CS. The WEN

bit is cleared on the positive edge of CS following the ASENB instruction.

Figure 19. AutoStore Enable Operation

CS

 

 

 

 

 

 

 

 

 

0

1

2

3

4

5

6

7

SCK

 

 

 

 

 

 

 

 

SI

0

1

0

1

1

0

0

1

 

SO

 

 

 

Hi-Z

 

 

 

 

 

 

 

 

 

 

 

HOLD Pin Operation

The HOLD pin is used to pause the serial communication. When the device is selected and a serial sequence is underway, HOLD is used to pause the serial communication with the master device without resetting the ongoing serial sequence. To pause, the HOLD pin must be brought LOW when the SCK pin is LOW. To resume serial communication, the HOLD pin must be brought HIGH when the SCK pin is LOW (SCK may toggle during HOLD). While the device serial communication is paused, inputs to the SI pin are ignored and the SO pin is in the high impedance state.

This pin can be used by the master with the CS pin to pause the serial communication by bringing the pin HOLD LOW and deselecting an SPI slave to establish communication with another slave device, without the serial communication being reset. The communication may be resumed at a later point by selecting the device and setting the HOLD pin HIGH.

Figure 20. HOLD Operation

CS

~~

SCK

~~

HOLD

 

SO

 

Document #: 001-44109 Rev. *B

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Contents Logic Block Diagram FeaturesOverview Sram ArrayPin Definitions Pin Name Type Description PinoutsHold Sram Write Device OperationSram Read Store OperationSerial Peripheral Interface SPI Master Commonly used terms used in SPI protocol are given belowSPI Modes System Configuration Using SPI nvSRAMSPI Functional Description SPI Operating FeaturesRead Status Register Rdsr Instruction Status RegisterWrite Status Register Wrsr Instruction Write Disable Wrdi Instruction Write Enable Wren InstructionWrite Protection and Block Protection Block ProtectionRead Sequence Read Memory AccessWrite Sequence Write Wpen WENRead RTC Rdrtc Instruction Burst Mode Read Instruction TimingNvSRAM Special Instructions AutoStore DisableWrite RTC Wrtc Instruction Software Store StoreAutoStore Enable Asenb AutoStore Disable AsdisbSoftware Recall Recall Hold Pin OperationReal Time Clock Operation Watchdog Timer AlarmCalibrating the Clock Interrupt Register Power MonitorInterrupts Flags RegisterRTC Recommended Component Configuration Accessing the Real Time Clock through SPIWDF Oscf RTC Register Map1 BCD Format Data Function/RangeOscen Alarm Hours Alarm DayAlarm Minutes Register Map DetailTime Keeping Centuries Register Map Detail Alarm SecondsFlags 0x00 WDF Oscf CALMaximum Ratings DC Electrical CharacteristicsOperating Range Parameter Description Test Conditions Min Max UnitCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsAC Switching Characteristics ~ ~ ~ ~ Switching Waveforms AutoStore or Power Up RecallParameters Description CY14B101P Unit Min Max CY14B101P Hardware Store Cycle To Output Active Time when write latch not setParameter Description Hardware Store Pulse WidthOrdering Information Ordering Code Package Diagram Package Type Operating RangePart Numbering Nomenclature CY 14 B 101 P SF X C TPin 300 mil Soic Package Package DiagramsREV ECN no Document HistorySubmission Orig. Description of Change Date Worldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationUSB