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Zhone Technologies, Inc. | IMACS Product Book, Version 4 |
IMACS Architecture Overview
The IMACS chassis architecture supports three types of buses and five card types. The buses are the:
•User
•WAN
•Server
Communicating through the buses are the following five card types:
•CPU
•WAN
•User
•Server
•Interface
Each system has at least one CPU, WAN and one Interface card. These three cards provide common functions for the shelf. The WAN, User, and Server cards provide the specific voice/data terminal and network interfaces and processing required by the customer to transfer voice and data traffic from the customer premise to the network. IMACS architecture has specific card slots, which are tailored to provide either a WAN, User or Server function.
IMACS System Bus Architecture
The IMACS is a multiprocessor-based platform that handles today’s network access needs and provides a migration path to the wide range of services of the future. A unique multi-bus architecture provides this flexibility by off- loading and isolating the Wide Area Network (WAN) link processing tasks from those of inter-processor communications and channel I/O (input/output) control and signaling. The CPU card employs multiple communication buses extended through the back plane to the User, Server, WAN and Interface Cards. The CPU uses these buses to configure hardware on User, Server, WAN, or Interface cards and solicit status. Depending on the intelligence on the card, the CPU may either read or write to the card’s hardware registers or send and receive messages using a messaging protocol.
This design approach yields two significant advantages over other access multiplexers. First, the off-loading of processing tasks across the multi-bus reduces system overhead, thereby improving the effective throughput and performance. Second, the isolation of functions allows rapid design and development of new network access compatible WAN functions. As the new functions are introduced, they occupy the Server card slot and do not impact or disrupt an existing system. For instance, the design of the Frame Relay Server card was performed utilizing the Server processor bus and is independent of other existing or future IMACS functions. When a Frame Relay server card is installed, it can perform Frame Relay access concentration on WAN links and fractional channels assigned to the IMACS. Figure 2 shows a functional block diagram of the IMACS’s multi-bus architecture and the manner in which functions are isolated.
