Zhone Technologies, Inc. | IMACS Product Book, Version 4 |
CPU Card Redundancy
The IMACS CPU cards typically support redundant operation when paired with an identical CPU card. The CPUs communicate with each other once every second. If there is a problem with the standby CPU (i.e., communications transfer did not take place), an alarm is raised by the active CPU, indicating a problem with the standby CPU. The active CPU monitoring is achieved via hardwire watchdog timers on the Interface Card. The Interface Card’s hardware timers are sensing specific control points from the controlling CPU circuit pack. These timers require only 8 seconds to detect and reset to the redundant blinking CPU card.
WAN Card Redundancy
The IMACS Dual WAN cards in conjunction with a Dual WAN card with Relays support a 1-to-N redundancy. For redundant operation, the redundant WAN card will be located in the last WAN slot which is marked W4 and can be used in systems with cross connect CPUs to act as a redundant card for up to three Dual WAN cards containing the same modules. Both ports of the redundant card must be populated with either the DSX/CEPT or CSU module and must be an exact match to any corresponding WAN Cards with which it is redundant.
All IMACS WAN cards communicate with the active CPU card every half-second. If the WAN card fails to properly communicate with the active CPU card, the WAN card is declared failed and a switch occurs. These actions occur within an eight second time frame. The WAN card failures can also occur from craft defined rules. These rules are based on Carrier Group Alarm (CGA) declaration assignments. A CGA switch will occur 1.5 seconds after a CGA declaration, or forced “OOS” command from the User Interface (UI). The WAN card will remain in the switched condition for 20 seconds, or until synchronization can be achieved. If synchronization is not achieved, the WAN switch will return to its original state. If the switch is successful, the active CPU issues an alarm and the WAN switch continues in a steady state operation.
ADPCM Redundancy
The IMACS Adaptive Differential Pulse Code Modulation (ADPCM) Server card provides 1-to-N redundancy when used with 2 other identical cards. The ADPCM card has on-board diagnostics that can detect a failure in one second, and switch in three seconds.
System Synchronization and Clocking
The Interface card includes a Stratum 4 clock circuit, which is capable of running off its own crystal oscillator or phase locking to a 8 KHz reference clock on the back plane. Any card plugged into the back plane that connects to a network-like facility can be programmed to supply the reference clock input to the Stratum 4 Clock. As an option, a separate external timing source may be used on a specific interface card.
The IMACS supports a three-tiered hierarchy of system clocking sources that are provisioned under the interface card menu options. Should the Primary source fail, the system will fall back onto the Secondary source. Should both Primary and Secondary sources fail, the system will default to its internal Stratum 4 clock. In all cases, recovery is automatic should the failed clock(s) recover.
Both the Primary and Secondary clocks can be user-programmed to be derived from the following:
•IMACS system’s internal oscillator.
•Any of the WAN interfaces in the system.
•A server card such as the ATM, which can provide timing through the DS3 link.
•A user card such as the BRI.
•An external synchronization device (framed T1 and unframed E1) through an 8922 I/F card.
