Motorola manual MVME6100 vmeCfg -s -o1

Page 34

Chapter 3 MOTLoad Firmware

Inbound window 0 (ITAT0) is not enabled; Virtual FIFO at 256 bytes, 2eSST timing at SST320, respond to 2eSST, 2eVME, MBLT, and BLT cycles, A32 address space, respond to Supervisor, User, Program, and Data cycles. Image maps from 0x00000000 to 0x1FFF0000 on the VMbus, translates 1x1 to the PCI-X bus (thus 1x1 to local memory). To enable this window, set bit 31 of ITAT0 to 1.

Note For Inbound Translations, the Upper Translation Offset Register needs to be set to 0xFFFFFFFF to ensure proper translations to the PCI-X Local Bus.

MVME6100> vmeCfg –s –o1

Displaying the

selected Default VME

Setting

 

 

- interpreted as

follows:

 

 

 

Outbound Image

1

Attribute Register

= 80001462

 

 

Outbound Image

1

Starting Address Upper Register

=

00000000

Outbound Image

1

Starting Address Lower Register

=

91000000

Outbound Image

1

Ending Address Upper Register =

00000000

Outbound Image

1

Ending Address Lower Register =

AFFF0000

Outbound Image

1

Translation Offset

Upper Register

= 00000000

Outbound Image

1

Translation Offset

Lower Register

= 70000000

Outbound Image

1

2eSST Broadcast Select Register

=

00000000

MVME6100>

 

 

 

 

 

Outbound window 1 (OTAT1) is enabled, 2eSST timing at SST320, transfer mode of 2eSST, A32/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from 0x91000000-0xAFFF0000 and translates them onto the VMEbus using an offset of 0x70000000, thus an access to 0x91000000 on the PCI-X Local Bus becomes an access to 0x01000000 on the VMEbus.

MVME6100> vmeCfg –s –o2

Displaying the

selected Default VME

Setting

 

 

- interpreted as

follows:

 

 

 

Outbound Image

2

Attribute Register

= 80001061

 

 

Outbound Image

2

Starting Address Upper Register

=

00000000

Outbound Image

2

Starting Address Lower Register

=

B0000000

Outbound Image

2

Ending Address Upper Register =

00000000

Outbound Image

2

Ending Address Lower Register =

B0FF0000

Outbound Image

2

Translation Offset

Upper Register

= 00000000

Outbound Image

2

Translation Offset

Lower Register

= 40000000

Outbound Image

2

2eSST Broadcast Select Register

=

00000000

MVME6100>

 

 

 

 

 

Outbound window 2 (OTAT2) is enabled, 2eSST timing at SST320, transfer mode of SCT, A24/D32 Supervisory access. The window accepts transfers on the PCI-X Local Bus from 0xB0000000-0xB0FF0000 and translates them onto the VMEbus using an offset of 0x40000000, thus an access to 0xB0000000 on the PCI-X Local Bus becomes an access to 0xF0000000 on the VMEbus.

MVME6100> vmeCfg –s –o3

Displaying the

selected Default VME

Setting

- interpreted as

follows:

 

 

Outbound Image

3

Attribute Register

= 80001061

Outbound

Image

3

Starting Address Upper

Register = 00000000

Outbound

Image

3

Starting Address Lower

Register = B3FF0000

24MVME6100 Installation and Use (V6100A/IH2)

Image 34
Contents Installation and Use V6100A/IH2Trademarks Safety Summary Flammability Limited and Restricted Rights Legend Contents Functional Description Specifications List of Figures Gigabit Ethernet Connectors J9, J93 Pin Assignment List of TablesAbout This Manual Overview of ContentsComments and Suggestions Conventions Used in This Manual About This ManualIntroduction Hardware Preparation and InstallationDescription Hardware Preparation and Installation Getting StartedUnpacking Guidelines Overview of Startup ProceduresStartup Overview Hardware Configuration MVME6100 PreparationMVME6100 Jumper and Switch Settings Jumper Switch Function SettingsMVME6100 Layout Scon Header J7 PMC/IPMC Selection Headers J10, J15 J18, J25 J28Srom Configuration Switch S3 Srom Configuration Switch S3No Srominit Flash Boot Bank Select Configuration Switch S4 Positio FunctionInstalling the MVME6100 into a Chassis Hardware InstallationConfiguration Switch S4 Connector Function Completing the InstallationMVME6100 Connectors Connection to PeripheralsFront-Panel LED Status Indicators Applying PowerSwitches and Indicators Startup and OperationOverview MOTLoad CommandsMOTLoad Firmware MOTLoad Implementation and Memory RequirementsMOTLoad Utility Applications MOTLoad TestsUsing MOTLoad Command Line InterfaceCommand Line Help Command Line RulesMOTLoad Commands MOTLoad Command ListCommand Description MOTLoad Commands MOTLoad Commands MOTLoad Commands Default VME Settings MVME6100 vmeCfg -s -mMVME6100 vmeCfg -s -o1 CR/CSR Settings Firmware SettingsDisplaying VME Settings Editing VME Settings VmeCfg -e -r40CRestoring Default VME Settings Deleting VME SettingsRemote Start Slot Position CS/CSR Starting Address Firmware Startup Sequence Following Reset Alternate Boot Images and Safe StartFirmware Scan for Boot Image Address Usage Checksum Algorithm Valid Boot ImagesName Type Size MOTLoad Image Flags MOTLoad Image FlagsUser Images Name Value InterpretationAlternate Boot Data Structure Feature Description FeaturesMVME6100 Features Summary Functional DescriptionBlock Diagram MVME6100 Block DiagramL3 Cache ProcessorSystem Controller CPU Bus Interface Memory Controller InterfaceGigabit Ethernet MACs Device Controller InterfacePCI/PCI-X Interfaces Device Bus ParametersI2O Message Unit General-Purpose Timers/CountersWatchdog Timer Four Channel Independent DMA ControllerInterrupt Controller Flash Memory VMEbus InterfacePMCspan Interface System MemoryPCI Mezzanine Card Slots Idsel Routing Real-Time Clock/NVRAM/Watchdog TimerReset Control Logic Debug SupportPin Assignments PMC Expansion Connector J4 Pin Assignments ConnectorsPMC Expansion Connector J4 Pin SignalPAR Gigabit Ethernet Connectors J9, J93 Pin Assignment Gigabit Ethernet Connectors J9, J93Pin # Signal 1000 Mb/s 10/100 Mb/s PCI Mezzanine Card PMC Connectors J11 J14, J21 J24 PMC Slot 1 Connector J11 Pin AssignmentsPMC Slot 1 Connector J12 Pin Assignments PMC Slot 1 Connector J13 Pin Assignments PMC Slot 1 Connector J14 Pin Assignments PMC Slot 2 Connector J21 Pin Assignments PMC Slot 2 Connector J22 Pin Assignments PMC Slot 2 Connector J23 Pin Assignments 10. PMC Slot 2 Connector J24 Pin Assignments COM1 Connector J19 11. COM1 Connector J19 Pin AssignmentsVMEbus P1 Connector 12. VMEbus P1 Connector Pin AssignmentsVMEBus P2 Connector PMC Mode 13. VMEbus P2 Connector Pin Assignments PMC ModeP2IOGLAN1M 14. VME P2 Connector Pinouts with IPMC712 VMEbus P2 Connector Ipmc ModePin Row Z Row a Row B Row C Row D 15. VME P2 Connector Pinouts with IPMC761 Headers 16. Scon Header J7 Pin AssignmentsBoundary Scan Header J8 18. PMC/IPMC Configuration Jumper Block17. Boundary Scan Header J8 Pin Assignments COM2 Header J29 19. COM2 Planar Serial Port Header J29 Pin AssignmentsProcessor JTAG/COP Header J42 21. Processor JTAG/COP RISCWatch Header J42 Pin AssignmentsEnvironmental Specifications SpecificationsPower Requirements Supply Current RequirementsAppendix a Specifications Thermal Validation Thermally Significant ComponentsMeasurement Table B-1. Thermally Significant ComponentsMax. Allowable Component Reference Designator Generic Description Deg. C LocationFigure B-1. Thermally Significant Components-Primary Side Figure B-2. Thermally Significant Components-Secondary Side Measuring Case Temperature Component Temperature MeasurementMeasuring Junction Temperature PreparationFigure B-3. Mounting a Thermocouple Under a Heatsink Measuring Local Air Temperature Figure B-4. Measuring Local Air TemperatureRelated Documentation Motorola Embedded Communications Computing DocumentsTable C-2. Manufacturers’ Documents Manufacturers’ DocumentsDocument Title and Source Publication Number Related Specifications Table C-3. Related SpecificationsTable C-3. Related Specifications Index Index