Motorola manual MVME6100 Block Diagram

Chapter 4 Functional Description

Table 4-1. MVME6100 Features Summary (continued)

Feature	Description
VME Interface	– Tsi148 VME 2eSST ASIC provides:
	■ Eight programmable VMEbus map decoders
	■ A16, A24, A32, and A64 address
	■ 8-bit, 16-bit, and 32-bit single cycle data transfers
	■ 8-bit, 16-bit, 32-bit, and 64-bit block transfers
	■ Supports SCT, BLT, MBLT, 2eVME, and 2eSST protocols
	■ 8 entry command and 4KB data write post buffer
	■ 4KB read ahead buffer
PMCspan Support	– One PMCspan slot
	– Supports 33/66 MHz, 32/64-bit PCI bus
	– Access through PCI6520 bridge to PMCspan
Form Factor	– Standard 6U VME
Miscellaneous	– Combined reset and abort switch
	– Status LEDs
	– 8-bit software-readable switch (S1)
	– VME geographical address switch (S3)
	– Boundary Scan header (J8)
	– CPU RISCWatch COP header (J42)

Block Diagram

Figure 4-1shows a block diagram of the overall board architecture.

Figure 4-1. MVME6100 Block Diagram

L3 Cache

DDR RAM

2MB

512MB-1GB

Soldered

Flash

211 MHz DDR

Bank A

64MB

MPC7457

DDR RAM

1.267 GHz

512MB-1GB

Soldered

Flash

133 MHz

133 MHz

RTC

Bank B

Processor Bus

Memory Bus

NVRAM

64MB

Discovery II

Host

Bridge

Device Bus

64-bit/133 MHz PCI-X

Serial

RJ-45

Gigabit

header

Ethernet

64-bit/33/66/100 MHz PCI-X

FP I/O

FP I/O

P-P Bridge

RJ-45

Gigabit

PMC

IPMC

32/64-bit,

Ethernet

Slot 1

Slot 2

VME

TSI148

33/66 MHz PCI

Jumper

Rows A&C

Rows D&Z

64-pins

Selectable

46-pins

PMC Span

Connector

RJ-45

P2

P1

4250 0604

36MVME6100 Installation and Use (V6100A/IH2)