Device Controller Interface

Chapter 4 Functional Description

The device controller supports up to five banks of devices, three of which are used for Flash Banks A and B, NVRAM/RTC. Each bank supports up to 512MB of address space, resulting in total device space of 1.5GB. Serial ports are the fourth and fifth devices on the MVME6100. Each bank has its own parameters register as shown in the following table.

Table 4-2. Device Bus Parameters

Flash Bank A	Device Bus Bank 0	Bank width 32-bit, parity disabled

Flash Bank B	Device Bus Boot Bank	Bank width 32-bit, parity disabled

Real-Time Clock	Device Bus Bank 1	Bank width 8-bit, parity disabled
Serial Ports
Board Specific Registers

PCI/PCI-X Interfaces

The MVME6100 provides two 32/64-bit PCI/PCI-X buses, operating at a maximum frequency of 100 MHz when configured to PCI-X mode, and run at 33 or 66 MHz when running conventional PCI mode. PCI bus 1 is connected to the PMC slots 1 and 2.

The maximum PCI-X frequency of 100 MHz supported by PCI bus 1 may be reduced depending on the number and/or type of PMC/PrPMC installed. If PCI bus 1 is set to +5V VIO, it runs at 33 MHz. VIO is set by the keying pins (they are both a keying pin and jumper). Both pins must be set for the same VIO on the PCI-X bus.

PCI bus 0 is connected to the Tsi148 device and PMCspan bridge. PCI bus 0 is configured for 133 MHz PCI-X mode.

The MV64360 PCI interfaces are fully PCI rev. 2.2 and PCI-X rev 1.0 compliant and support both address and data parity checking. The MV64360 contains all of the required PCI configuration registers. All internal registers, including the PCI configuration registers, are accessible from the CPU bus or the PCI buses.

Gigabit Ethernet MACs

The MVME6100 supports two 10/100/1000Mb/s full duplex Ethernet ports connected to the front panel via the MV64360 system controller. Ethernet access is provided by front panel RJ- 45 connectors with integrated magnetics and LEDs. Port 1 is a dedicated Gigabit Ethernet port while a configuration header is provided for port 2 front or rear P2 access Refer to Front/Rear Ethernet and Transition Module Options Header (J30) for more information.

Each Ethernet interface is assigned an Ethernet Station Address. The address is unique for each device. The Ethernet Station Addresses are displayed on labels attached to the PMC front-panel keep-out area.

The MV64360 is not integrated with a PHY for the Ethernet interfaces. External PHY is the Broadcom BCM5421S (51NW9663B83 117BGA) 10/100/1000BaseT Gigabit transceiver with SERDES interface. Refer to Appendix C, Related Documentation for more information.

MVME6100 Installation and Use (V6100A/IH2)