Transcend Information TS1G-32GCF133 dimensions CF-ATA Drive Register Set Definition and Protocol

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TS1G~32GCF133		133X CompactFlash Card

CF-ATA Drive Register Set Definition and Protocol

The CompactFlash Storage Card can be configured as a high performance I/O device through:

a)The standard PC-AT disk I/O address spaces 1F0h-1F7h, 3F6h-3F7h (primary) or 170h- 177h, 376h-377h (secondary) with IRQ 14 (or other available IRQ).

b)Any system decoded 16 byte I/O block using any available IRQ.

c)Memory space.

The communication to or from the CompactFlash Storage Card is done using the Task File registers, which provide all the necessary registers for control and status information related to the storage medium. The PCMCIA interface connects peripherals to the host using four register mapping methods. Table 39 is a detailed description of these methods:

Transcend Information Inc.

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Contents Dimensions Placement FeaturesDescription Transcend Block Diagram Pin Assignments and Pin Type TS1G~32GCF133 133X CompactFlash Card Signal DescriptionDir Signal Name Dir Pin Description Inpack Iowr VCC Wait TS1G~32GCF133 Electrical SpecificationOutput Drive Type Output Drive Characteristics Signal Interface Pull-up pin 45 BVD2 to avoid sensing their batteries as Low TS1G~32GCF133133X CompactFlash CardSeries termination required for Ultra DMA operation Ultra DMA Electrical RequirementsTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification TS1G~32GCF133 Common Memory Read Timing Specification Common Memory Write Timing Specification Input Read Timing Specification TS1G~32GCF133 Output Write Timing Specification TS1G~32GCF133 True IDE PIO Mode Read/Write Timing Specification TS1G~32GCF133 Table Ultra DMA Data Burst Timing True IDE Ultra DMA Mode Read/Write Timing SpecificationTS1G~32GCF133 TS1G~32GCF133 TS1G~32GCF133 TS1G~32GCF133 Multiple Function CompactFlash Storage Cards Card ConfigurationAttribute Memory Function Attribute Memory FunctionConfiguration Option Register Base + 00h in Attribute Memory TS1G~32GCF133 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O Function Table Common Memory Function Common Memory Transfer FunctionTrue IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding Contiguous I/O Mapped AddressingMemory Mapped Addressing True IDE Mode AddressingData Register Address 1F0h170hOffset 0,8,9 CF-ATA RegistersCylinder Low LBA 15-8 Register Address 1F4h174h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Sector Number LBA 7-0 Register Address 1F3h173h OffsetTS1G~32GCF133 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh LBA CF-ATA Command SetDefinitions Check Power Mode 98h or E5h Erase Sectors C0h Execute Drive Diagnostic 90hFormat Track 50h Flush Cache E7hIdentify Device Ech Word Default Total Data Field Type InformationTotal Data Field Type Information Word 6 Default Number of Sectors per Track Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 3 Default Number of HeadsWords 10-19 Serial Number Word 49 Capabilities Bit 13 Standby TimerPIO Data Transfer Cycle Timing Mode Words 7-8 Number of Sectors per CardWord 64 Advanced PIO transfer modes supported Multiple Sector SettingTotal Sectors Addressable in LBA Mode Multiword DMA transferWord 68 Minimum PIO transfer cycle time with Iordy Words 82-84 Features/command sets supportedWord 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabledWord 128 Security Status Bit 8 Security Level Word 91 Advanced power management level valueWord 160 Power Requirement Description Word 89 Time required for Security erase unit completionAdditional Requirements for CF Advanced Timing Modes Value Maximum PIO mode timing selectedValue Value Maximum Memory timing mode Supported Value Maximum Pcmcia IO timing mode SupportedIdle 97h or E3h Initialize Drive Parameters 91h Idle Immediate 95h or E1hNOP 00h Read DMA C8h Read Long Sector 22h or 23h Read Buffer E4hTS1G~32GCF133 Seek 7Xh Set Features EFh Feature Supported TS1G~32GCF133 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87hWear Level F5h Write Buffer E8h Write DMA CAh TS1G~32GCF133 TS1G~32GCF133 Error Posting Smart Command Set Smart Feature Register Values Smart Command SetDecription Smart Data Structure