Ampro Corporation Littleboard 550 manual IDSEL1, REQ1, GNT2, CLK3, Intb, Pme, Par

Page 34

Chapter 3

Hardware

Pin #

Signal

Input/

Description

 

 

Output

 

74 (C14)

+3.3V

 

+3.3 volts ±5% power supply

75 (C15)

AD17

T/S

PCI Address and Data Bus Line 17 – Refer to Pin 3 for more

 

 

 

information.

76 (C16)

GND

 

Ground

77 (C17)

AD22

T/S

PCI Address and Data Bus Line 22 – Refer to Pin 3 for more

 

 

 

information.

78 (C18)

IDSEL1

 

Initialization Device Select 1 – Refer to Pin 18 for more

 

 

 

information

79 (C19)

VI/O

NC

(+5V) Not connected

80 (C20)

AD25

T/S

PCI Address and Data Bus Line 25 – Refer to Pin 3 for more

 

 

 

information.

81 (C21)

AD28

T/S

PCI Address and Data Bus Line 28 – Refer to Pin 3 for more

 

 

 

information.

82 (C22)

GND

 

Ground

83 (C23)

REQ1*

T/S

Bus Request 1 – Refer to Pin 23 for more information.

 

 

 

 

84 (C24)

+5V

 

+5 volts ±5% power supply

85 (C25)

GNT2*

T/S

Grant 2 – Refer to Pin 25 for more information

 

 

 

 

86 (C26)

GND

 

Ground

87 (C27)

CLK3

In

PCI clock 3 – Refer to Pin 27 for more information

 

 

 

 

88 (C28)

+5V

 

+5 volts ±5% power supply

89 (C29)

INTB*

O/D

Interrupt B – This signal is used to request interrupts only for multi-

 

 

 

function devices.

90 (C30)

PME*

 

Power Management Event – This signal is used for power

 

 

 

management events

91 (D1)

AD00

T/S

PCI Address and Data Bus Line 0 – Refer to Pin 3 for more

 

 

 

information.

92 (D2)

+5V

 

+5 volts ±5% power supply

93 (D3)

AD03

T/S

PCI Address and Data Bus Lines 3 – Refer to Pin 3 for more

 

 

 

information.

94 (D4)

AD06

T/S

PCI Address and Data Bus Lines 6 – Refer to Pin 3 for more

 

 

 

information.

95 (D5)

GND

 

Ground

96 (D6)

GND

 

Ground

97 (D7)

AD12

T/S

PCI Address and Data Bus Line 12 – Refer to Pin 3 for more

 

 

 

information.

98 (D8)

+3.3V

 

+3.3 volts ±5% power supply

99 (D9)

PAR

T/S

PCI bus Parity bit – This signal is the even parity bit on AD[31:0]

 

 

 

and C/BE[3:0]*

100 (D10)

NC

NC

Not connected (Snoop Done)

 

 

 

 

101 (D11)

GND

 

Ground

102 (D12)

Devsel*

S/T/S

Device Select – This signal is driven by the target device when its

 

 

 

address is decoded.

28

Reference Manual

LittleBoard 550

Image 34
Contents LittleBoard Single Board Computer Reference Manual Audience Assumptions Contents Appendix a List of Tables Table A-1 Purpose of this Manual SpecificationsReference Material LittleBoard 550 Support Products Related Ampro ProductsOther LittleBoard Products Other Ampro Products Chapter Product Overview EBX ArchitectureProduct Description Stacking PC/104 Modules with the LittleBoardBoard Features Chapter Chapter Block Diagram ATAVIA Major Integrated Circuits ICsChip Type Mfg Model Description Function CPUAdditional Components Connector DefinitionsJack # Signal Description DIMM1Northb Indicator Definition Jumper # Installed Removed/InstalledDefault Jumper DefinitionsThb Physical Specifications SpecificationsDimension Mechanical Specifications LittleBoard 550 Dimensions Top view, #1115 705 415 730 200 050 350 800 600 385 345 Environmental Specifications Power SpecificationsThermal/Cooling Requirements Reference Manual LittleBoard Overview USBSdram Memory DIMM1 CPU U1Memory Flash Memory U17Interrupt Channel Assignments Memory MapAddress hex Subsystem Address MapBase Address Function VGAPin # Signal Input Description Output PC/104-Plus Interface J21GNT1 IDSEL0REQ0 CLK2Intd REQ2CLK0 IntaGNT2 IDSEL1REQ1 CLK3GNT0 IDSEL2IDSEL3 CLK1Pin # Signal Description J1 Row a PC/104 Interface J1A,B,C,DPin # Signal Descriptions J1 Row B DACK1 DACK3DRQ3 DRQ1Pin # Signal Descriptions J1 Row C Pin # Signal Descriptions J1 Row DDACK0 IRQ15IRQ14 DRQ0Pin # Signal Description IDE Interface J12, J17Pdior PdreqPdiow PdiordySDD9 SDD8SDD6 SDD5SDA2 SDA1SDA0 SDCS1#PDCE1 CompactFlash Adapter J23VCC PDCE2 PdrstFloppy Drive Interface J14 Pin # Signal In/Out Description Parallel Port Interface J15Serial Interfaces J11, J13 RS485 Serial Port ImplementationRXD1 DCD1DSR1 RTS1DCD3 CTS2DTR2 DSR3RXD4 DCD4DSR4 RTS4Utility Interfaces Utility 1 Interface J16Mouse Interface Utility 2 Interface J24System Management Bus SMBus Component Address Binary USB Signals USB0 and USB1Sdram Eprom Batlow SuscPwrbt MdataUSB Signals USB2 and USB3 Utility 3 Interface J18Ethernet Interfaces J7, J32 TX+Audio Interface J28 Videor VideolVideognd CDLVideo Interfaces J3, J4, J5, J31 CRT InterfaceLCD Interface Enavdd Pin # Signal Description Line Channel Lvds InterfaceMiscellaneous Temperature MonitoringOops! Jumper Bios Recovery Real Time Clock RTCWatchdog Timer Hot Cable JumperCPU Fan Power Interface J10Power Monitor TAGReference Manual LittleBoard Accessing Bios Setup VGA Display IntroductionAccessing Bios Setup Serial Console Bios Setup Menu Item/TopicBios Menus Bios Setup Opening ScreenDate & Time Bios Configuration ScreenDrive Configurations and Boot Options Drive Assignment# of Floppy Drives Bios Settings Boot Order Drive and Boot OptionsUser Interface Options Keyboard and Mouse ConfigurationUser Interface Memory Control Options MemoryPower Management Power Management and Advanced User OptionsAdvanced features On-Board Serial Ports On-Board LPT Port On-Board Controllers Video, Flat Panel, and Audio OptionsOn-Board Video PCI, Plug n Play, and Interrupt Assignments Chapter Bios Setup Chapter Bios Setup Chapter Bios Setup Splash Screen Image Requirements Splash Screen CustomizationConverting the Splash Screen File \splashconvert convert.idf Appendix a Technical Support Method Contact InformationAppendix a Technical Support Connector Designation Pin # Mfg Part Number Appendix B Appendix C LAN Boot Option PXE Boot Agent Bios Setup Accessing PXE Boot Agent Bios SetupPXE Configuration PXE Boot Agent Setup ScreenTCP/IP Configuration NetWare Configuration RPL ConfigurationCD-ROM CRTDocumentation and Support Software Doc & SW CD-ROM PostSupported features WDTReference Manual LittleBoard