Ampro Corporation Littleboard 550 manual LCD Interface

Page 62

Chapter 3Hardware

LCD Interface 1

Table 3-24. LCD Interface 1 Pin/Signal Descriptions (J3)

Pin #

Signal

Description

1

GND

Ground

2

+3.3V

+3.3V

3

+12V

+12V

4

GND

Ground

5

FPCLK

Flat panel shift clock

 

 

 

6

GND

Ground

7

FPDE

Flat panel display enable

8

GND

Ground

9

LP

Line Pulse – This signal is the digital monitor equivalent of HSYNC

 

 

 

10

FLM

First Line Marker – This signal is digital monitor equivalent of VSYNC

11

GND

Ground

12

FP0

Flat Panel Data Output 0 – Mapping for this signal changes with the type of

 

 

flat panel selected in BIOS Setup. ⊗Refer to the notes for this table.

13

FP1

Flat Panel Data Output 1 – Refer to pin 12 for more information.

 

 

 

14

FP2

Flat Panel Data Output 2 – Refer to pin 12 for more information.

 

 

 

15

FP3

Flat Panel Data Output 3 – Refer to pin 12 for more information.

16

FP4

Flat Panel Data Output 4 –Refer to pin 12 for more information.

 

 

 

17

FP5

Flat Panel Data Output 5 – Refer to pin 12 for more information.

 

 

 

18

FP6

Flat Panel Data Output 6 – Refer to pin 12 for more information.

19

FP7

Flat Panel Data Output 7 – Refer to pin 12 for more information.

 

 

 

20

FP8

Flat Panel Data Output 8 – Refer to pin 12 for more information.

 

 

 

21

FP9

Flat Panel Data Output 9 – Refer to pin 12 for more information.

22

FP10

Flat Panel Data Output 10 – Refer to pin 12 for more information.

 

 

 

23

FP11

Flat Panel Data Output 11 – Refer to pin 12 for more information.

 

 

 

24

FP12

Flat Panel Data Output 12 – Refer to pin 12 for more information.

25

FP13

Flat Panel Data Output 13 – Refer to pin 12 for more information.

 

 

 

26

FP14

Flat Panel Data Output 14 – Refer to pin 12 for more information.

 

 

 

27

FP15

Flat Panel Data Output 15 – Refer to pin 12 for more information.

28

FP16

Flat Panel Data Output 16 – Refer to pin 12 for more information.

 

 

 

29

FP17

Flat Panel Data Output 17 – Refer to pin 12 for more information.

 

 

 

30

FP18

Flat Panel Data Output 18 – Refer to pin 12 for more information.

31

FP19

Flat Panel Data Output 19 – Refer to pin 12 for more information.

 

 

 

32, 33

+5V

+5V +/- %5

34

+3.3V

+3.3V +/- %5

35, 36

NC

Not Connected

 

 

 

37

+3.3V

+3.3V +/- %5

38

ENAVEE

Enable VEE

56

Reference Manual

LittleBoard 550

Image 62
Contents LittleBoard Single Board Computer Reference Manual Audience Assumptions Contents Appendix a List of Tables Table A-1 Reference Material SpecificationsPurpose of this Manual Other LittleBoard Products Related Ampro ProductsLittleBoard 550 Support Products Other Ampro Products Chapter Product Overview EBX ArchitectureProduct Description Stacking PC/104 Modules with the LittleBoardBoard Features Chapter Chapter Block Diagram ATAVIA Major Integrated Circuits ICsChip Type Mfg Model Description Function CPUAdditional Components Connector DefinitionsJack # Signal Description DIMM1Northb Indicator Definition Jumper # Installed Removed/InstalledDefault Jumper DefinitionsThb Dimension SpecificationsPhysical Specifications Mechanical Specifications LittleBoard 550 Dimensions Top view, #1115 705 415 730 200 050 350 800 600 385 345 Thermal/Cooling Requirements Power SpecificationsEnvironmental Specifications Reference Manual LittleBoard Overview USBSdram Memory DIMM1 CPU U1Memory Flash Memory U17Interrupt Channel Assignments Memory MapAddress hex Subsystem Address MapBase Address Function VGAPin # Signal Input Description Output PC/104-Plus Interface J21GNT1 IDSEL0REQ0 CLK2Intd REQ2CLK0 IntaGNT2 IDSEL1REQ1 CLK3GNT0 IDSEL2IDSEL3 CLK1Pin # Signal Description J1 Row a PC/104 Interface J1A,B,C,DPin # Signal Descriptions J1 Row B DACK1 DACK3DRQ3 DRQ1Pin # Signal Descriptions J1 Row C Pin # Signal Descriptions J1 Row DDACK0 IRQ15IRQ14 DRQ0Pin # Signal Description IDE Interface J12, J17Pdior PdreqPdiow PdiordySDD9 SDD8SDD6 SDD5SDA2 SDA1SDA0 SDCS1#VCC CompactFlash Adapter J23PDCE1 PDCE2 PdrstFloppy Drive Interface J14 Pin # Signal In/Out Description Parallel Port Interface J15Serial Interfaces J11, J13 RS485 Serial Port ImplementationRXD1 DCD1DSR1 RTS1DCD3 CTS2DTR2 DSR3RXD4 DCD4DSR4 RTS4Utility Interfaces Utility 1 Interface J16System Management Bus SMBus Utility 2 Interface J24Mouse Interface Sdram Eprom USB Signals USB0 and USB1Component Address Binary Batlow SuscPwrbt MdataUSB Signals USB2 and USB3 Utility 3 Interface J18Ethernet Interfaces J7, J32 TX+Audio Interface J28 Videor VideolVideognd CDLVideo Interfaces J3, J4, J5, J31 CRT InterfaceLCD Interface Enavdd Pin # Signal Description Line Channel Lvds InterfaceMiscellaneous Temperature MonitoringOops! Jumper Bios Recovery Real Time Clock RTCWatchdog Timer Hot Cable JumperCPU Fan Power Interface J10Power Monitor TAGReference Manual LittleBoard Accessing Bios Setup VGA Display IntroductionAccessing Bios Setup Serial Console Bios Setup Menu Item/TopicBios Menus Bios Setup Opening ScreenDate & Time Bios Configuration ScreenDrive Configurations and Boot Options Drive Assignment# of Floppy Drives Bios Settings Boot Order Drive and Boot OptionsUser Interface Keyboard and Mouse ConfigurationUser Interface Options Memory Control Options MemoryAdvanced features Power Management and Advanced User OptionsPower Management On-Board Serial Ports On-Board LPT Port On-Board Video Video, Flat Panel, and Audio OptionsOn-Board Controllers PCI, Plug n Play, and Interrupt Assignments Chapter Bios Setup Chapter Bios Setup Chapter Bios Setup Converting the Splash Screen File Splash Screen CustomizationSplash Screen Image Requirements \splashconvert convert.idf Appendix a Technical Support Method Contact InformationAppendix a Technical Support Connector Designation Pin # Mfg Part Number Appendix B Appendix C LAN Boot Option PXE Boot Agent Bios Setup Accessing PXE Boot Agent Bios SetupTCP/IP Configuration PXE Boot Agent Setup ScreenPXE Configuration NetWare Configuration RPL ConfigurationCD-ROM CRTDocumentation and Support Software Doc & SW CD-ROM PostSupported features WDTReference Manual LittleBoard