Ampro Corporation Littleboard 550 manual Pin # Signal Descriptions J1 Row B

Page 37

Chapter 3

 

Hardware

 

 

 

 

 

Pin #

Signal

Description (J1 Row A)

 

23 (A23)

SA8

System Address 8 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

24 (A24)

SA7

System Address 7 – Refer to SA19, pin-A12, for more information.

 

25 (A25)

SA6

System Address 6 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

26 (A26)

SA5

System Address 5 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

27 (A27)

SA4

System Address 4 – Refer to SA19, pin-A12, for more information.

 

28 (A28)

SA3

System Address 3 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

29 (A29)

SA2

System Address 2 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

30 (A30)

SA1

System Address 1 – Refer to SA19, pin-A12, for more information.

 

31 (A31)

SA0

System Address 0 – Refer to SA19, pin-A12, for more information.

 

 

 

 

 

32 (A32)

GND

Ground

 

 

 

 

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

Table 3-6. PC/104 Interface Pin/Signal Descriptions (J1B)

Pin #

Signal

Descriptions (J1 Row B)

33

(B1)

GND

Ground

34

(B2)

RESETDRV

Reset Drive – This signal is used to reset or initialize system logic on

 

 

 

power up or subsequent system reset.

35

(B3)

+5V

+5 volt power ±10%

36

(B4)

IRQ9

Interrupt request 9 – Asserted by a device when it has pending interrupt

 

 

 

request. Only one device may use the request line at a time.

37

(B5)

-5V

Not connected (-5 volts)

38

(B6)

DRQ2

DMA Request 2 – Used by I/O resources to request DMA service, or to

 

 

 

request ownership of the bus as a bus master device. Must be held high

 

 

 

until associated DACK2 line is active.

39

(B7)

-12V

Not connected (-12 volts)

40

(B8)

ENDXFR*

Zero Wait State – This signal is driven low by a bus slave device to

 

 

 

indicate it is capable of performing a bus cycle without inserting any

 

 

 

additional wait states. To perform a 16-bit memory cycle without wait

 

 

 

states, this signal is derived from an address decode.

41

(B9)

+12V

+12 Volts

42

(B10)

Key

Key Pin (Not connected)

 

 

 

 

43

(B11)

SMEMW*

System Memory Write – This signal is used by bus owner to request a

 

 

 

memory device to store data currently on the data bus and only active for

 

 

 

the lower 1MB. Used for legacy compatibility with 8-bit cards.

44

(B12)

SMEMR*

System Memory Read – This signal is used by bus owner to request a

 

 

 

memory device to drive data onto the data bus and only active for lower

 

 

 

1MB. Used for legacy compatibility with 8-bit cards.

45

(B13)

IOW*

I/O Write – This strobe signal is driven by the owner of the bus (ISA bus

 

 

 

master or DMA controller) and instructs the selected I/O device to capture

 

 

 

the write data on the data bus.

46

(B14)

IOR*

I/O Read – This strobe signal is driven by the owner of the bus (ISA bus

 

 

 

master or DMA controller) and instructs the selected I/O device to drive

 

 

 

read data onto the data bus.

LittleBoard 550

Reference Manual

31

Image 37
Contents LittleBoard Single Board Computer Reference Manual Audience Assumptions Contents Appendix a List of Tables Table A-1 Purpose of this Manual SpecificationsReference Material LittleBoard 550 Support Products Related Ampro ProductsOther LittleBoard Products Other Ampro Products Chapter EBX Architecture Product OverviewStacking PC/104 Modules with the LittleBoard Product DescriptionBoard Features Chapter Chapter ATA Block DiagramChip Type Mfg Model Description Function Major Integrated Circuits ICsVIA CPUJack # Signal Description Connector DefinitionsAdditional Components DIMM1Northb Default Jumper # Installed Removed/InstalledIndicator Definition Jumper DefinitionsThb Physical Specifications SpecificationsDimension LittleBoard 550 Dimensions Top view, #1 Mechanical Specifications115 705 415 730 200 050 350 800 600 385 345 Environmental Specifications Power SpecificationsThermal/Cooling Requirements Reference Manual LittleBoard USB OverviewMemory CPU U1Sdram Memory DIMM1 Flash Memory U17Memory Map Interrupt Channel AssignmentsBase Address Function Address MapAddress hex Subsystem VGAPC/104-Plus Interface J21 Pin # Signal Input Description OutputREQ0 IDSEL0GNT1 CLK2CLK0 REQ2Intd IntaREQ1 IDSEL1GNT2 CLK3IDSEL3 IDSEL2GNT0 CLK1PC/104 Interface J1A,B,C,D Pin # Signal Description J1 Row aPin # Signal Descriptions J1 Row B DRQ3 DACK3DACK1 DRQ1Pin # Signal Descriptions J1 Row D Pin # Signal Descriptions J1 Row CIRQ14 IRQ15DACK0 DRQ0IDE Interface J12, J17 Pin # Signal DescriptionPdiow PdreqPdior PdiordySDD6 SDD8SDD9 SDD5SDA0 SDA1SDA2 SDCS1#PDCE1 CompactFlash Adapter J23VCC Pdrst PDCE2Floppy Drive Interface J14 Parallel Port Interface J15 Pin # Signal In/Out DescriptionRS485 Serial Port Implementation Serial Interfaces J11, J13DSR1 DCD1RXD1 RTS1DTR2 CTS2DCD3 DSR3DSR4 DCD4RXD4 RTS4Utility 1 Interface J16 Utility InterfacesMouse Interface Utility 2 Interface J24System Management Bus SMBus Component Address Binary USB Signals USB0 and USB1Sdram Eprom Pwrbt SuscBatlow MdataUtility 3 Interface J18 USB Signals USB2 and USB3TX+ Ethernet Interfaces J7, J32Audio Interface J28 Videognd VideolVideor CDLCRT Interface Video Interfaces J3, J4, J5, J31LCD Interface Enavdd Lvds Interface Pin # Signal Description Line ChannelOops! Jumper Bios Recovery Temperature MonitoringMiscellaneous Real Time Clock RTCHot Cable Jumper Watchdog TimerPower Monitor Power Interface J10CPU Fan TAGReference Manual LittleBoard Introduction Accessing Bios Setup VGA DisplayBios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Bios MenusDrive Configurations and Boot Options Bios Configuration ScreenDate & Time Drive Assignment# of Floppy Drives Bios Settings Drive and Boot Options Boot OrderUser Interface Options Keyboard and Mouse ConfigurationUser Interface Memory Memory Control OptionsPower Management Power Management and Advanced User OptionsAdvanced features On-Board Serial Ports On-Board LPT Port On-Board Controllers Video, Flat Panel, and Audio OptionsOn-Board Video PCI, Plug n Play, and Interrupt Assignments Chapter Bios Setup Chapter Bios Setup Chapter Bios Setup Splash Screen Image Requirements Splash Screen CustomizationConverting the Splash Screen File \splashconvert convert.idf Method Contact Information Appendix a Technical SupportAppendix a Technical Support Connector Designation Pin # Mfg Part Number Appendix B Appendix C LAN Boot Option Accessing PXE Boot Agent Bios Setup PXE Boot Agent Bios SetupPXE Configuration PXE Boot Agent Setup ScreenTCP/IP Configuration RPL Configuration NetWare ConfigurationCRT CD-ROMPost Documentation and Support Software Doc & SW CD-ROMWDT Supported featuresReference Manual LittleBoard